Datasheet

AD9775
Rev. E | Page 9 of 56
ABSOLUTE MAXIMUM RATINGS
Table 7.
Parameter With Respect To Rating
AVDD, DVDD, CLKVDD AGND, DGND, CLKGND −0.3 V to +4.0 V
AVDD, DVDD, CLKVDD AVDD, DVDD, CLKVDD −4.0 V to +4.0 V
AGND, DGND, CLKGND AGND, DGND, CLKGND −0.3 V to +0.3 V
REFIO, FSADJ1/FSADJ2 AGND −0.3 V to AVDD + 0.3 V
I
OUTA
, I
OUTB
AGND −1.0 V to AVDD + 0.3 V
P1B13 to P1B0, P2B13 to P2B0, RESET DGND −0.3 V to DVDD + 0.3 V
DATACLK, PLL_LOCK DGND −0.3 V to DVDD + 0.3 V
CLK+, CLK– CLKGND −0.3 V to CLKVDD + 0.3 V
LPF CLKGND −0.3 V to CLKVDD + 0.3 V
SPI_CSB, SPI_CLK, SPI_SDIO, SPI_SDO DGND −0.3 V to DVDD + 0.3 V
Junction Temperature 125°C
Storage Temperature −65°C to +150°C
Lead Temperature (10 sec) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
THERMAL RESISTANCE
θ
JA
is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 8. Thermal Resistance
Package Type θ
JA
Unit
80-Lead Thin Quad Flat Package
(TQFP_EP), Exposed Pad
23.5 °C/W