Datasheet

AD9775
Rev. E | Page 5 of 56
SPECIFICATIONS
DC SPECIFICATIONS
T
MIN
to T
MAX
, AVDD = 3.3 V, CLKVDD = 3.3 V, DVDD = 3.3 V, PLLVDD = 3.3 V, I
OUTFS
= 20 mA, unless otherwise noted.
Table 1.
Parameter Min Typ Max Unit
RESOLUTION 14 Bits
DC Accuracy
1
Integral Nonlinearity −5 ±1.5 +5 LSB
Differential Nonlinearity −3 ±1.0 +3 LSB
ANALOG OUTPUT (for 1R and 2R Gain Setting Modes)
Offset Error −0.02 ±0.01 +0.02 % of FSR
Gain Error (with Internal Reference) −1.0 +1.0 % of FSR
Gain Matching −1.0 ±0.1 +1.0 % of FSR
Full-Scale Output Current
2
2 20 mA
Output Compliance Range −1.0 +1.25 V
Output Resistance 200 kΩ
Output Capacitance 3 pF
Gain, Offset Cal DACs, Monotonicity Guaranteed
REFERENCE OUTPUT
Reference Voltage 1.14 1.20 1.26 V
Reference Output Current
3
100 nA
REFERENCE INPUT
Input Compliance Range 0.1 1.25 V
Reference Input Resistance 7 kΩ
Small Signal Bandwidth 0.5 MHz
TEMPERATURE COEFFICIENTS
Offset Drift 0 ppm of FSR/°C
Gain Drift (with Internal Reference) 50 ppm of FSR/°C
Reference Voltage Drift ±50 ppm/°C
POWER SUPPLY
AVDD
Voltage Range 3.1 3.3 3.5 V
Analog Supply Current (I
AVDD
)
4
72.5 76 mA
I
AVDD
in SLEEP Mode 23.3 26 mA
CLKVDD
Voltage Range 3.1 3.3 3.5 V
Clock Supply Current (I
CLKVDD
)
4
8.5 10.0 mA
CLKVDD (PLL ON)
Clock Supply Current (I
CLKVDD
) 23.5 mA
DVDD
Voltage Range 3.1 3.3 3.5 V
Digital Supply Current (I
DVDD
)
4
34 41 mA
Nominal Power Dissipation 380 410 mW
P
DIS
5
1.75 W
P
DIS
IN PWDN 6.0 mW
Power Supply Rejection Ratio—AVDD ±0.4 % of FSR/V
OPERATING RANGE −40 +85 °C
1
Measured at I
OUTA
driving a virtual ground.
2
Nominal full-scale current, I
OUTFS
, is 32 × the I
REF
current.
3
Use an external amplifier to drive any external load.
4
100 MSPS f
DAC
with f
OUT
= 1 MHz, all supplies = 3.3 V, no interpolation, no modulation.
5
400 MSPS f
DAC
= 50 MSPS, f
S
/2 modulation, PLL enabled.