Datasheet

AD9772A
Rev. C | Page 23 of 40
1.2V REF
REFIO
FSADJ
CURRENT
SOURCE
ARRAY
250pF
REFLO AVDD
AD9772A
2kΩ
0.1µF
ADDITIONAL
LOAD
OPTIONAL
EXTERNAL
REF BUFFER
2.7V TO 3.6V
02253-038
Figure 38. Internal Reference Configuration
The internal reference can be disabled by connecting REFLO to
AVDD. In this case, an external 1.2 V reference, such as the
AD1580, can be applied to REFIO as shown in
Figure 39. The
external reference can provide either a fixed reference voltage to
enhance accuracy and drift performance or a varying reference
voltage to improve gain control. Note that the 0.1 μF compensation
capacitor is not required because the internal reference is disabled
and the high input impedance of REFIO minimizes any loading
of the external reference.
+1.2V REF
REFIO
FSADJ
CURRENT
SOURCE
ARRAY
250pF
REFLO AVDD
AD9772A
A
D1580
2.7V TO 3.6V
REFERENCE
CONTROL
AMPLIFIER
R
SET
I
REF
=
V
REFIO
/R
SET
10kΩ
V
REFIO
02253-039
Figure 39. External Reference Configuration
REFERENCE CONTROL AMPLIFIER
The AD9772A also contains an internal control amplifier that is
used to regulate the DAC’s full-scale output current, I
OUTFS
. The
control amplifier is configured as a V-I converter, as shown in
Figure 39, such that its current output, I
REF
, is determined by the
ratio of the V
REFIO
and an external resistor, R
SET
, as stated in
Equation 4. I
REF
is copied to the segmented current sources with
the proper scaling factor to set I
OUTFS
as stated in Equation 3.
The control amplifier allows a wide (10:1) adjustment span of
I
OUTFS
over a 2 mA to 20 mA range by setting I
REF
between
62.5 μA and 625 μA. The wide adjustment span of I
OUTFS
pro-
vides several application benefits. The first benefit relates
directly to the power dissipation of the AD9772A DAC, which
is proportional to I
OUTFS
(see the Power Dissipation section).
The second benefit relates to the 20 dB adjustment, which is
useful for system gain control purposes.
I
REF
can be controlled using the single-supply circuit shown in
Figure 40 for a fixed R
SET
. In this example, the internal refer-
ence is disabled, and the voltage of REFIO is varied over its
compliance range of 1.25 V to 0.10 V. REFIO can be driven by a
single-supply DAC or digital potentiometer, thus allowing I
REF
to be digitally controlled for a fixed R
SET
. This particular example
shows the AD5220, an 8-bit serial input digital potentiometer,
along with the AD1580 voltage reference. Note that because the
input impedance of REFIO does interact with and load the
digital potentiometer wiper to create a slight nonlinearity in the
programmable voltage divider ratio, a digital potentiometer
with 10 kΩ or less resistance is recommended.
1.2V REF
REFIO
FSADJ
CURRENT
SOURCE
ARRAY
250pF
REFLO AVDD
AD9772A
AD1580
2.7V TO 3.6V
R
SET
10kΩ
10kΩ
AD5220
1.2V
02253-040
Figure 40. Single-Supply Gain Control Circuit
ANALOG OUTPUTS
The AD9772A produces two complementary current outputs,
I
OUTA
and I
OUTB
, which can be configured for single-ended or
differential operation. I
OUTA
and I
OUTB
can be converted into
complementary single-ended voltage outputs, V
B
OUTA
and V
OUTB
,
via a load resistor, R
LOAD
, as described in the
section, by using Equation 5 through Equation 8. The
differential voltage, V
DAC Transfer
Function
DIFF
, existing between V
OUTA
and V
OUTB
, can
also be converted to a single-ended voltage via a transformer or
differential amplifier configuration.
Figure 41 shows the equivalent analog output circuit of the
AD9772A, which consists of a parallel combination of PMOS
differential current switches associated with each segmented
current source. The output impedance of I
OUTA
and I
OUTB
is
determined by the equivalent parallel combination of the PMOS
switches and is typically 200 kΩ in parallel with 3 pF. Due to the
nature of a PMOS device, the output impedance is also slightly
dependent on the output voltage (that is, V
B
OUTA
and V
OUTB
) and,
to a lesser extent, the analog supply voltage, AVDD, and full-
scale current, I
OUTFS
. Although the signal dependency of the
output impedance can be a source of dc nonlinearity and ac
linearity (that is, distortion), its effects can be limited if certain
precautions are taken.
AD9772A
AVDD
I
OUTA
R
LOAD
R
LOAD
I
OUTB
02253-041
Figure 41. Equivalent Analog Output Circuit
I
OUTA
and I
OUTB
also have a negative and positive voltage
compliance range. The negative output compliance threshold
of −1.0 V is set by the breakdown limits of the CMOS process.
Operation beyond this maximum limit may result in a breakdown