Datasheet

AD976/AD976A
–4–
REV. C
All Grades
Parameter Conditions Min Typ Max Units
DIGITAL OUTPUTS
Data Format Parallel 16 Bits
Data Coding Binary Twos Complement
V
OL
I
SINK
= 1.6 mA +0.4 V
V
OH
I
SOURCE
= 500 µA+4 V
Leakage Current High-Z State, ±5 µA
V
OUT
= 0 V to V
DIG
Output Capacitance High-Z State 15 pF
DIGITAL TIMING
Bus Access Time 83 ns
Bus Relinquish Time 83 ns
POWER SUPPLIES
Specified Performance
V
DIG
4.75 5 5.25 V
V
ANA
4.75 5 5.25 V
I
DIG
3.0 mA
I
ANA
11 mA
Power Dissipation 100 mW
TEMPERATURE RANGE
Specified Performance –40 +85 °C
Specifications subject to change without notice.
TIMING SPECIFICATIONS
(AD976A: F
S
= 200 kHz; AD976: F
S
= 100 kHz; –40ⴗC to +85ⴗC, V
DIG
= V
ANA
= +5 V unless otherwise noted)
Symbol Min Typ Max Units
Convert Pulsewidth t
1
50 ns
Data Valid Delay after R/C Low (AD976A/AD976) t
2
4.0/8.0 µs
BUSY Delay from R/C Low t
3
83 ns
BUSY Low (AD976A/AD976) t
4
4.0/8.0 µs
BUSY Delay after End of Conversion (AD976A/AD976) t
5
180/360 ns
Aperture Delay t
6
40 ns
Conversion Time (AD976A/AD976) t
7
3.8/7.6 4.0/8.0 µs
Acquisition Time t
8
1.0/2.0 µs
Bus Relinquish Time t
9
10 35 83 ns
BUSY Delay after Data Valid (AD976A/AD976) t
10
50 180/360 ns
Previous Data Valid after R/C Low (AD976A/AD976) t
11
3.7/7.4 µs
Throughput Time (AD976A/AD976) t
7
+ t
8
5/10 µs
R/C to CS Setup Time t
12
10 ns
Time Between Conversions (AD976A/AD976) t
13
5/10 µs
Bus Access and Byte Delay t
14
10 83 ns
Specifications subject to change without notice.