Datasheet

DC SPECIFICATIONS
Parameter Min Typ Max Units
RESOLUTION 14 Bits
DC ACCURACY
1
Integral Linearity Error (INL)
T
A
= +25°C –3.0 ±1.5 +3.0 LSB
Differential Nonlinearity (DNL)
T
A
= +25°C –2.0 ±0.75 +2.0 LSB
ANALOG OUTPUT
Offset Error –0.02 +0.02 % of FSR
Gain Error (Without Internal Reference) –2 ±0.5 +2 % of FSR
Gain Error
(With Internal Reference) –5 ±1.5 +5 % of FSR
Full-Scale Output Current
2
2.0 20.0 mA
Output Compliance Range –1.0 1.25 V
Output Resistance 100 kΩ
Output Capacitance 5 pF
REFERENCE OUTPUT
Reference Voltage 1.14 1.20 1.26 V
Reference Output Current
3
100 nA
REFERENCE INPUT
Input Compliance Range 0.1 1.25 V
Reference Input Resistance 1 MΩ
Small Signal Bandwidth 0.5 MHz
TEMPERATURE COEFFICIENTS
Offset Drift 0 ppm of FSR/°C
Gain Drift (Without Internal Reference) ±50 ppm of FSR/°C
Gain Drift
(With Internal Reference) ±100 ppm of FSR/°C
Reference Voltage Drift ±50 ppm/°C
POWER SUPPLY
Supply Voltages
AVDD 4.5 5.0 5.5 V
DVDD 2.7 5.0 5.5 V
Analog Supply Current (I
AVDD
)
4
34 39 mA
Digital Supply Current (I
DVDD
)
5
3.0 5 mA
Supply Current Sleep Mode (I
AVDD
)
6
4.0 8 mA
Power Dissipation
5
(5 V, I
OUTFS
= 20 mA) 185 220 mW
Power Supply Rejection Ratio
7
—AVDD –0.4 +0.4 % of FSR/V
Power Supply Rejection Ratio
7
—DVDD –0.025 +0.025 % of FSR/V
OPERATING RANGE –40 +85 °C
NOTES
1
Measured at IOUTA, driving a virtual ground.
2
Nominal full-scale current, I
OUTFS
, is 32 × the I
REF
current.
3
Use an external buffer amplifier to drive any external load.
4
Requires +5 V supply.
5
Measured at f
CLOCK
= 25 MSPS and I
OUT
= static full scale (20 mA).
6
Logic level for SLEEP pin must be referenced to AVDD. Min V
IH
= 3.5 V.
7
± 5% Power supply variation.
Specifications subject to change without notice.
(T
MIN
to T
MAX
, AVDD = +5 V, DVDD = +5 V, I
OUTFS
= 20 mA, unless otherwise noted)
–2–
REV. A
AD9754–SPECIFICATIONS