Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- FUNCTIONAL BLOCK DIAGRAM
- GENERAL DESCRIPTION
- PRODUCT HIGHLIGHTS
- SPECIFICATIONS
- ABSOLUTE MAXIMUM RATINGS
- ORDERING GUIDE
- THERMAL CHARACTERISTIC
- PIN CONFIGURATION
- PIN FUNCTION DESCRIPTIONS
- TERMINOLOGY
- Typical Performance Characteristics
- FUNCTIONAL DESCRIPTION
- REFERENCE OPERATION
- REFERENCE CONTROL AMPLIFIER
- PLL CLOCK MULTIPLIER OPERATION
- DAC TIMING WITH PLL ACTIVE
- PLL DISABLED MODE
- INTERLEAVED (2 ) MODE WITH PLL DISABLED
- NONINTERLEAVED MODE WITH PLL DISABLED
- DAC TRANSFER FUNCTION
- ANALOG OUTPUTS
- DIGITAL INPUTS
- INPUT CLOCK AND DATA TIMING RELATIONSHIP
- POWER DISSIPATION
- APPLYING THE AD9753 OUTPUT CONFIGURATIONS
- DIFFERENTIAL COUPLING USING A TRANSFORMER
- DIFFERENTIAL COUPLING USING AN OP AMP
- SINGLE-ENDED UNBUFFERED VOLTAGE OUTPUT
- SINGLE-ENDED BUFFERED VOLTAGE OUTPUT
- POWER AND GROUNDING CONSIDERATIONS, POWER SUPPLY REJECTION
- APPLICATIONS
- EVALUATION BOARD
- OUTLINE DIMENSIONS
- Revision History
REV. B
AD9753
–27–
OUTLINE DIMENSIONS
48-Lead Low Profile Quad Flat Package [LQFP]
(ST-48)
Dimensions shown in millimeters
TOP VIEW
(PINS DOWN)
1
12
13
25
24
36
37
48
0.27
0.22
0.17
0.50
BSC
7.00
BSC SQ
SEATING
PLANE
1.60
MAX
0.75
0.60
0.45
VIEW A
9.00 BSC
SQ
PIN 1
0.20
0.09
1.45
1.40
1.35
0.08 MAX
COPLANARITY
VIEW A
ROTATED 90ⴗ CCW
SEATING
PLANE
10ⴗ
6ⴗ
2ⴗ
7ⴗ
3.5ⴗ
0ⴗ
0.15
0.05
COMPLIANT TO JEDEC STANDARDS MS-026BBC