Datasheet
Data Sheet AD9748
Rev. B | Page 7 of 24
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
DB1
(LSB) DB0
DVDD
NC
NC
NC
NC
NC
FS ADJ
REFIO
ACOM
IOUTA
IOUTB
ACOM
AVDD
AVDD
NC
DCOM
CLKVDD
CLK+
CLK–
CLKCOM
CMODE
MODE
DB2
DB3
DB4
DB5
DB6
DB7 (MSB)
DCOM
SLEEP
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
AD9748
T
O
P VIEW
(Not to Scale)
03211-003
NOTES
1. NC = NO CONNECT. DO NOT CONNECT
TO THIS PIN.
2. IT IS RECOMMENDED THA
T THE EXPOSED P
AD
BE THERMALLY CONNECTED
TO
A
COPPER
GROUND PLANE FOR ENHANCED ELECTRICAL
AND THERMAL
PERFORMANCE.
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
27 DB7 (MSB) Most Significant Data Bit (MSB).
28 to 32, 1 DB6 to DB1 Data Bits 6 to 1.
2 DB0 (LSB) Least Significant Data Bit (LSB).
3 DVDD Digital Supply Voltage (3.3 V).
4 to 9
NC
No Internal Connection.
10, 26 DCOM Digital Common.
11 CLKVDD Clock Supply Voltage (3.3 V).
12 CLK+ Differential Clock Input.
13 CLK− Differential Clock Input.
14 CLKCOM Clock Common.
15 CMODE
Clock Mode Selection. Connect to CLKCOM for single-ended clock receiver (drive CLK+ and float
CLK–). Connect to CLKVDD for differential receiver. Float for PECL receiver (terminations on-chip).
16 MODE Selects Input Data Format. Connect to DCOM for straight binary, DVDD for twos complement.
17, 18 AVDD Analog Supply Voltage (3.3 V).
19, 22 ACOM Analog Common.
20 IOUTB Complementary DAC Current Output. Full-scale current when all data bits are 0s.
21 IOUTA DAC Current Output. Full-scale current when all data bits are 1s.
23 REFIO Reference Input/Output. Requires 0.1 µF capacitor to ACOM.
24 FS ADJ Full-Scale Current Output Adjust.
25 SLEEP
Power-Down Control Input. Active high. Contains active pull-down circuit; it can be left unterminated
if not used.
EPAD
It is recommended that the exposed pad be thermally connected to a copper ground plane for enhanced
electric and thermal performance.