Datasheet

Data Sheet AD9748
Rev. B | Page 5 of 24
DIGITAL SPECIFICATIONS
T
MIN
to T
MAX
, AVDD = 3.3 V, DVDD = 3.3 V, CLKVDD = 3.3 V, I
OUTFS
= 20 mA, unless otherwise noted.
Table 3.
Parameter Min Typ Max Unit
DIGITAL INPUTS
Logic 1 Voltage 2.1 3 V
Logic 0 Voltage 0 0.9 V
Logic 1 Current −10 +10 μA
Logic 0 Current −10 +10 μA
Input Capacitance 5 pF
Input Setup Time (t
S
) 2.0 ns
Input Hold Time (t
H
) 1.5 ns
Latch Pulse Width (t
LPW
) 1.5 ns
CLK INPUTS
1
Input Voltage Range 0 3 V
Common-Mode Voltage 0.75 1.5 2.25 V
Differential Voltage 0.5 1.5 V
1
Applicable to CLK+ and CLK− inputs when configured for differential or PECL clock input mode.
0.1%
0.1%
t
S
t
H
t
PD
DB0–DB7
CLOCK
IOUTA
OR
IOUTB
t
LPW
t
ST
03211-002
Figure 2. Timing Diagram