Datasheet

AD9742 Data Sheet
Rev. C | Page 10 of 32
50
55
60
65
70
75
SFDR (dBc)
80
85
90
0 20–40 –20 40 60 80
TEMPERATURE (°C)
02912-B-019
4MHz
19MHz
34MHz
49MHz
Figure 17. SFDR vs. Temperature @ 165 MSPS, 0 dBFS
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
MAGNITUDE (dBm)
1 6 11 16 21 26 31 36
FREQUENCY (MHz)
02912-B-016
f
CLOCK
= 78MSPS
f
OUT
= 15.0MHz
SFDR = 79dBc
AMPLITUDE = 0dBFS
Figure 18. Single-Tone SFDR
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
MAGNITUDE (dBm)
1 6 11 16 21 26 31 36
FREQUENCY (MHz)
02912-B-018
f
CLOCK
= 78MSPS
f
OUT1
= 15.0MHz
f
OUT2
= 15.4MHz
SFDR = 77dBc
AMPLITUDE = 0dBFS
Figure 19. Dual-Tone SFDR
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
MAGNITUDE (dBm)
1 6 11 16 21 26 31 36
FREQUENCY (MHz)
02912-B-020
f
CLOCK
= 78MSPS
f
OUT1
= 15.0MHz
f
OUT2
= 15.4MHz
f
OUT3
= 15.8MHz
f
OUT4
= 16.2MHz
SFDR = 75dBc
AMPLITUDE = 0dBFS
Figure 20. Four-Tone SFDR
DIGITAL DATA INPUTS (DB11–DB0)
150pF
1.2V REF
AVDD
ACOM
REFLO
PMOS
CURRENT SOURCE
ARRAY
3.3V
SEGMENTED SWITCHES
FOR DB11–DB3
LSB
SWITCHES
REFIO
FS ADJ
DVDD
DCOM
CLOCK
3.3V
R
SET
2k
0.1µF
IOUTA
IOUTB
AD9742
SLEEP
LATCHES
I
REF
V
REFIO
CLOCK
IOUTB
IOUTA
R
LOAD
50
V
OUTB
V
OUTA
R
LOAD
50
V
DIFF
= V
OUTA
– V
OUTB
MODE
02912-B-021
Figure 21. Simplified Block Diagram (SOIC/TSSOP Packages)