Datasheet

AD9740
Rev. B | Page 21 of 32
R6
OPT
S2
IOUTA
2
A
B
JP10
1
3
IX
C13
OPT
JP8
IOUT
S3
4
5
6
3
2
1
T1
T1-1T
JP9
C12
OPT
R10
10kΩ
S1
IOUTB
1
2
3
AB
JP11
IY
1
EXT
2
3
INT
AB
JP5
REF
+
+
C14
16V
A
V
DD
DVDD
C
KEXT
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
AVDD
C15
16V
CUT
UNDER DUT
JP6
JP4
R5
OPT
DVDD
R4
CLOCK
S5
CLOCK
TP1
WHT
DVDD
AVDD
DVDD
R2
JP2
MODE
TP3
WHT
REF
C2C1
C11
R1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
U1
AD9740
SLEEP
TP11
WHT
R3
CLOCK
DVDD
DCOM
MODE
AVDD
RESERVED
IOUTA
IOUTB
ACOM
NC
FS ADJ
REFIO
REFLO
SLEEP
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
AVDD
02911-038
C17
0.1μF
C16
0.1μF
10μF
10μF
C19
0.1μF
C18
0.1μF
0.1μF
2kΩ
10kΩ
0.1μF
0.1μF
R11
10kΩ
10kΩ
50Ω
Figure 40. SOIC Evaluation Board—Output Signal Conditioning