Datasheet

AD9740
Rev. B | Page 20 of 32
EVALUATION BOARD
GENERAL DESCRIPTION
The TxDAC family evaluation boards allow for easy setup and
testing of any TxDAC product in the SOIC and LFCSP packages.
Careful attention to layout and circuit design, combined with a
prototyping area, allows the user to evaluate the AD9740 easily
and effectively in any application where high resolution, high
speed conversion is required.
This board allows the user the flexibility to operate the AD9740
in various configurations. Possible output configurations
include transformer coupled, resistor terminated, and single
and differential outputs. The digital inputs are designed to be
driven from various word generators, with the on-board option
to add a resistor network for proper load termination. Provisions
are also made to operate the AD9740 with either the internal or
external reference or to exercise the power-down feature.
2
R1
3
R2
4
R3
5
R4
6
R5
7
R6
8
R7
9
R8
10
R9
RP5
OPT
1
DCOM
161
RP3 22Ω
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DB13X
DB12X
DB11X
DB10X
DB9X
DB8X
DB7X
DB6X
DB5X
DB4X
DB3X
DB2X
DB1X
DB0X
152
RP3 22Ω
14
3
RP3 22Ω
13
4
RP3 22Ω
12
5
RP3 22Ω
11
6
RP3 22Ω
10
7
RP3 22Ω
9
8
RP3 22Ω
16
1
RP4 22Ω
15
2
RP4 22Ω
14
3
RP4 22Ω
13
4
RP4 22Ω
12
5
RP4 22Ω
11
6
RP4 22Ω
9
8
RP4 22Ω
10
7
RP4 22Ω
CKEXT
CKEXTX
2
R1
3
R2
4
R3
5
R4
6
R5
7
R6
8
R7
9
R8
10
R9
RP6
OPT
1
DCOM
2
R1
3
R2
4
R3
5
R4
6
R5
7
R6
8
R7
9
R8
10
R9
RP1
OPT
1
DCOM
2
R1
3
R
2
4
R3
5
R4
6
R5
7
R6
8
R7
9
R8
10
R9
RP2
OPT
1
DCOM
21
DB13X
4
3
DB12X
65
DB11X
87
DB10X
10 9
DB9X
12 11
DB8X
14 13
DB7X
16 15
DB6X
18 17
DB5X
20 19
DB4X
22 21
DB3X
24 23
DB2X
26 25
DB1X
28 27
DB0X
30 29
32 31
34 33
CKEXTX
36 35
38 37
40 39
JP3
J1
RIBBON
TB1 1
TB1 2
L2 BEAD
C7
0.1μF
TP4
BLK
+
DVDD
TP7
C6
0.1μF
C4
10μF
25V
BLK BLK
TP8
TP2
RED
TB1 3
TB1 4
L3 BEAD
C9
0.1μF
TP6
BLK
+
AVDD
TP10
C8
0.1μF
C5
10μF
25V
BLK BLK
TP9
TP5
RED
02911-037
Figure 39. SOIC Evaluation Board—Power Supply and Digital Inputs