Datasheet

AD9714/AD9715/AD9716/AD9717
Rev. A | Page 7 of 80
DIGITAL SPECIFICATIONS
T
MIN
to T
MAX
, AVDD = 3.3 V, DVDD = 1.8 V, DVDDIO = 3.3 V, CVDD = 3.3 V, I
xOUTFS
= 2 mA, maximum sample rate, unless
otherwise noted.
Table 2.
Parameter Min Typ Max Unit
DAC CLOCK INPUT (CLKIN)
V
IH
2.1 3 V
V
IL
0 0.9 V
Maximum Clock Rate 125 MSPS
SERIAL PERIPHERAL INTERFACE
Maximum Clock Rate (SCLK) 25 MHz
Minimum Pulse Width High 20 ns
Minimum Pulse Width Low 20 ns
INPUT DATA
1.8 V Q Channel or DCLKIO Falling Edge
Setup 0.25 ns
Hold 1.2 ns
1.8 V I Channel or DCLKIO Rising Edge
Setup 0.13 ns
Hold 1.1 ns
3.3 V Q Channel or DCLKIO Falling Edge
Setup −0.2 ns
Hold 1.5 ns
3.3 V I Channel or DCLKIO Rising Edge
Setup −0.2 ns
Hold 1.6 ns
V
IH
2.1 3 V
V
IL
0 0.9 V