Datasheet

AD9714/AD9715/AD9716/AD9717
Rev. A | Page 37 of 80
Register Address Bit Name Description
IRSET 0x04 7 IRSETEN
0 (default): IR
SET
resistor value for I channel is set by an external resistor connected
to the FADJI/AUXI pin. Nominal value for this external resistor is 16 kΩ.
1: enables the on-chip IR
SET
value to be changed for I channel.
5:0 IRSET[5:0]
Changes the value of the on-chip IR
SET
resistor for I channel; this scales the full-scale
current of the DAC in ~0.25 dB steps twos complement (nonlinear); see Figure 99.
000000 (default): IR
SET
= 16 kΩ.
011111: IR
SET
= 32 kΩ.
100000: IR
SET
= 8 kΩ.
111111: IR
SET
= 16 kΩ.
IRCML 0x05 7 IRCMLEN
0 (default): IR
CML
resistor value for the I channel is set by an external resistor
connected to the CMLI pin. Recommended value for this external resistor is 0 Ω.
1: enables on-chip IR
CML
adjustment for I channel.
5:0 IRCML[5:0]
Changes the value of the on-chip IR
CML
resistor for I channel; this adjusts the
common-mode level of the DAC output stage.
000000 (default): IR
CML
= 250 Ω.
100000: IR
CML
= 625 Ω.
111111: IR
CML
= 1 kΩ.
Q DAC Gain 0x06 5:0 Q DACGAIN[5:0]
DAC Q fine gain adjustment; alters the full-scale current as shown in Figure 100.
Default QDACGAIN = 0x00.
QRSET 0x07 7 QRSETEN
0 (default): QR
SET
resistor value for Q channel is set by an external resistor connected
to the FADJQ/AUXQ pin. Recommended value for this external resistor is 16 kΩ.
1: enables on-chip QR
SET
adjustment for Q channel.
5:0 QRSET[5:0]
Changes the value of the on-chip QR
SET
resistor for Q channel; this scales the full-
scale current of the DAC in ~0.25 dB steps twos complement (nonlinear); see
Figure 99.
000000 (default): QR
SET
= 16 kΩ.
011111: QR
SET
= 32 kΩ.
100000: QR
SET
= 8 kΩ.
111111: QR
SET
= 16 kΩ.
QRCML 0x08 7 QRCMLEN
0 (default): QR
CML
resistor value for the Q channel is set by an external resistor
connected to CMLQ pin. Recommended value for this external resistor is 0 Ω.
1: enables on-chip QR
CML
adjustment for Q channel.
5:0 QRCML[5:0]
Changes the value of the on-chip QR
CML
resistor for Q channel; this adjusts the
common-mode level of the DAC output stage.
000000 (default): QR
CML
= 250 Ω.
100000: QR
CML
= 625 Ω.
111111: QR
CML
= 1 kΩ.
AUXDAC Q 0x09 7:0 QAUXDAC[7:0] AUXDAC Q output voltage adjustment word LSBs.
0x3FF: sets AUXDAC Q output to full scale.
0x200: sets AUXDAC Q output to midscale.
0x000 (default): sets AUXDAC Q output to bottom of scale.
AUX CTLQ 0x0A 7 QAUXEN 0 (default): AUXDAC Q output disabled.
1: enables AUXDAC Q output.
6:5 QAUXRNG[1:0] 00 (default): sets AUXDAC Q output voltage range to 2 V.
01: sets AUXDAC Q output voltage range to 1.5 V.
10: sets AUXDAC Q output voltage range to 1.0 V.
11: sets AUXDAC Q output voltage range to 0.5 V.
4:2 QAUXOFS[2:0] 000 (default): sets AUXDAC Q top of range to 1.0 V.
001: sets AUXDAC Q top of range to 1.5 V.
010: sets AUXDAC Q top of range to 2.0 V.
011: sets AUXDAC Q top of range to 2.5 V.
100: sets AUXDAC Q top of range to 2.9 V.
1:0 QAUXDAC[9:8] AUXDAC Q output voltage adjustment word MSBs (default = 00).