Datasheet

Octal Ultrasound AFE
With Digital Demodulator
Data Sheet
AD9670
Rev. Sp0 Document Feedback
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FEATURES
8 channels of LNA, VGA, AAF, ADC, and digital demodulator/
decimator
Low power: 150 mW per channel, TGC mode, 40 MSPS;
65 mW per channel, CW mode; <30 mW at power-up
10 mm × 10 mm, 144-ball CSP-BGA
TGC channel input-referred noise: 0.8 nV/√Hz, maximum gain
Flexible power-down modes
Fast recovery from low power standby mode: <2 μs
Low noise preamplifier (LNA)
Input-referred noise: 0.78 nV/√Hz, gain = 21.6 dB
Programmable gain: 15.6 dB/17.9 dB/21.6 dB
0.1 dB compression: 1.00 V p-p/.75 V p-p/.45 V p-p
Flexible active input impedance matching
Variable gain amplifier (VGA)
Attenuator range: 45 dB, linear-in-dB gain control
Postamp gain (PGA): 21 dB/24 dB/27 dB/30 dB
Antialiasing filter (AAF)
Programmable second-order LPF from 8 MHz to 18 MHz or
13.5 MHz to 30 MHz and HPF
Analog-to-digital converter (ADC)
SNR: 75 dB, 14 bits up to 125 MSPS
Configurable serial LVDS
CW mode harmonic rejection I/Q demodulator
Individual programmable phase rotation
Dynamic range per channel: >160 dBc/√Hz
Close-in SNR: 156 dBc/√Hz, 1 kHz offset, −3 dBFS
Digital demodulator/decimator
I/Q demodulator with programmable oscillator FIR
decimation filter: 16 taps per decimation factor
GENERAL DESCRIPTION
The AD9670 is designed for low cost, low power, small size, and
ease of use for medical ultrasound. It contains eight channels of a
variable gain amplifier (VGA) with a low noise preamplifier (LNA),
a CW harmonic rejection I/Q demodulator with programmable
phase rotation, an antialiasing filter (AAF), an analog-to-digital
converter (ADC), and a digital demodulator and decimator for
data processing and bandwidth reduction.
Each channel features a maximum gain of up to 52 dB, a fully
differential signal path, and an active input preamplifier termination.
The channel is optimized for high dynamic performance and
low power in applications where a small package size is critical.
The LNA has a single-ended-to-differential gain that is selectable
through the SPI. Assuming a 15 MHz noise bandwidth (NBW) and
a 21.6 dB LNA gain, the LNA input SNR is 94 dB. In CW Doppler
mode, each LNA output drives an I/Q demodulator that has inde-
pendently programmable phase rotation with 16 phase settings.
Power-down of individual channels is supported to increase battery
life for portable applications. Standby mode allows quick power-
up for power cycling. In CW Doppler operation, the VGA, AAF,
and ADC are powered down. The ADC contains several features
designed to maximize flexibility and minimize system cost, such as
a programmable clock, data alignment, and programmable digital
test pattern generation. The digital test patterns include built-in
fixed patterns, built-in pseudorandom patterns, and custom
user-defined test patterns entered via the serial port interface.
This product is protected by a U.S. patent.
FUNCTIONAL BLOCK DIAGRAM
AAF
VGA
LNA
CWD AND I/Q
DEMODULATOR
8 CHANNELS
SERIAL
PORT
INTERFACE
DATA
RATE
MULTIPLIER
REFERENCE
LO
GENERATION
LO-A TO LO-H
LOSW-A TO LOSW-H
LI-A TO LI-H
LG-A TO LG-H
DOUTA+ TO DOUTH+
DOUTA– TO DOUTH–
DVDD DRVDD
CLK–
CLK+
SDIO
SCLK
CSB
ADDR[0:4]
GPO[0:3]
RBIAS
VREF
NCO
TX_TRIG+
TX_TRIG–
CWQ+
CWQ–
CWI+
CWI–
GAIN–
GAIN+
MLO–
MLO+
RESET+
RESET–
STBYPDWNAVDD2AVDD1
FCO–
FCO+
DCO+
DCO–
11041-001
SERIALIZER
LVDS
DEMODULATOR/
DECIMATOR
14-BIT
ADC
AD9670
Figure 1.
For more information about the AD9670, contact Analog Devices, Inc., at [e-mail].