Datasheet

AD9648
Rev. 0 | Page 5 of 44
AD9648-105 AD9648-125
Parameter Temp Min Typ Max Min Typ Max Unit
POWER CONSUMPTION
DC Input Full 135.4 155.5 mW
Sine Wave Input (DRVDD = 1.8 V CMOS
Output Mode)
Full 172.3 181.3 202.5 211.5 mW
Sine Wave Input (DRVDD = 1.8 V LVDS
Output Mode)
Full 180.4 189.4 211.5 220.5 mW
Standby Power
3
Full 108 120 mW
Power-Down Power Full 2.0 2.0 mW
1
Measure with a low input frequency, full-scale sine wave, with approximately 5 pF loading on each output bit.
2
Input capacitance refers to the effective capacitance between one differential input pin and AGND.
3
Standby power is measured with a dc input and with the CLK± pins active (1.8 V CMOS mode).
AC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.0 V internal reference, DCS enabled, unless
otherwise noted.
Table 2.
AD9648-105 AD9648-125
Parameter
1
Temp Min Typ Max Min Typ Max Unit
SIGNAL-TO-NOISE-RATIO (SNR)
f
IN
= 9.7 MHz 25°C 75.4 75.0 dBFS
f
IN
= 30.5 MHz 25°C 75.2 74.7 dBFS
f
IN
= 70 MHz 25°C 74.8 74.5 dBFS
Full 73.8 73.0 dBFS
f
IN
= 100 MHz
25°C 73.8 73.9 dBFS
f
IN
= 200 MHz 25°C 71.0 71.5 dBFS
SIGNAL-TO-NOISE AND DISTORTION (SINAD)
f
IN
= 9.7 MHz 25°C 74.3 73.9 dBFS
f
IN
= 30.5 MHz 25°C 74.0 73.4 dBFS
f
IN
= 70 MHz 25°C 73.4 73.3 dBFS
Full 73.0 72.8 dBFS
f
IN
= 100 MHz 25°C 72.8 72.8 dBFS
f
IN
= 200 MHz 25°C
69.6
70.3
dBFS
EFFECTIVE NUMBER OF BITS (ENOB)
f
IN
= 9.7 MHz
25°C 12.0 11.9 Bits
f
IN
= 30.5 MHz
25°C
12.0
11.9
Bits
f
IN
= 70 MHz
25°C 11.8 11.8 Bits
f
IN
= 100 MHz
25°C 11.8 11.8 Bits
f
IN
= 200 MHz
25°C 11.3 11.4 Bits
WORST SECOND OR THIRD HARMONIC
f
IN
= 9.7 MHz
25°C
−98 −96
dBc
f
IN
= 30.5 MHz
25°C
−90 −90
dBc
f
IN
= 70 MHz
25°C
−93 −91
dBc
Full
−86 −82
dBc
f
IN
= 100 MHz
25°C
−92 −90
dBc
f
IN
= 200 MHz
25°C
−81 −84
dBc