Datasheet

AD9648
Rev. 0 | Page 4 of 44
SPECIFICATIONS
DC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.0 V internal reference, DCS enabled, unless
otherwise noted.
Table 1.
AD9648-105 AD9648-125
Parameter Temp Min Typ Max Min Typ Max Unit
RESOLUTION Full 14 14 Bits
ACCURACY
No Missing Codes Full Guaranteed Guaranteed
Offset Error Full −0.8 −0.3 +0.2 −0.8 −0.3 +0.2 % FSR
Gain Error Full −4.20 ±1.3 +4.2 −5.1 ±1.3 +5.1 % FSR
Differential Nonlinearity (DNL)
1
Full −0.5 +1.2 −0.5 +1.2 LSB
25°C ±0.5 ±0.5 LSB
Integral Nonlinearity (INL)
1
Full −2.3 +2.3 −2.3 +2.3 LSB
25°C ±1.0 ±1.0 LSB
MATCHING CHARACTERISTIC
Offset Error Full ±0.01
±0.58
±0.01 ±0.58 % FSR
Gain Error Full ±0.5 ±4.0 ±0.5 ±4.0 % FSR
TEMPERATURE DRIFT
Offset Error Full ±2 ±2 ppm/°C
Gain Error Full ±50 ±50 ppm/°C
INTERNAL VOLTAGE REFERENCE
Output Voltage (1 V Mode) Full 0.98 1.00 1.02 0.98 1.00 1.02 V
Load Regulation Error at 1.0 mA Full 2 2 mV
INPUT REFERRED NOISE
VREF = 1.0 V 25°C 0.98 0.98 LSB rms
ANALOG INPUT
Input Span, VREF = 1.0 V Full 2 2 V p-p
Input Capacitance
2
Full 5 5 pF
Input Resistance (Differential) Full 7.5 7.5 kΩ
Input Common-Mode Voltage Full 0.9 0.9 V
Input Common-Mode Range Full 0.5 1.3 0.5 1.3 V
POWER SUPPLIES
Supply Voltage
AVDD Full 1.7 1.8 1.9 1.7 1.8 1.9 V
DRVDD Full 1.7 1.8 1.9 1.7 1.8 1.9 V
Supply Current
I
AVDD
1
Full 81 86 95 100 mA
I
DRVDD
(1.8 V CMOS)
1
Full 19.2 22.5 mA
I
DRVDD
(1.8 V LVDS)
1
Full 63.5 65.0 mA