Datasheet

UG-294 Evaluation Board User Guide
Rev. B | Page 6 of 48
Clock Circuitry
The default clock input circuit that is populated on the AD9644
and AD9641 evaluation boards uses a simple transformer-coupled
circuit using a high bandwidth 1:1 impedance ratio transformer
(T503) that adds a very low amount of jitter to the clock path.
The clock input is 50 Ω terminated and ac-coupled to handle
single-ended sine wave types of inputs. The transformer converts
the single-ended input to a differential signal that is clipped by
CR503 before entering the ADC clock inputs.
The board is set by default to use an external clock generator.
An external clock source capable of driving a 50 Ω terminated
input should be connected to J702.
A differential LVPECL clock driver output can also be used to
clock the ADC input using the AD9524 (U501). To place the
AD9524 into the clock path, populate R541 and R542 with 0 Ω
resistors and remove R522 and R523 to disconnect the default
clock path outputs. In addition, populate R533 and R534 with
0 Ω resistors. Next, place Y501, which is the Epson Toyocom
voltage controlled oscillator that serves as the VCXO for the
AD9524. By completing these connections, OUT2 of the AD9524
is connected to the sampling clock inputs of the AD9644/AD9641.
The AD9524 must be configured through the SPI controller
software to set up the PLL and other operation modes. Consult
the AD9524 data sheet for more information about these and
other options.
An additional clocking option is provided on the AD9644
evaluation board. In place of connecting an external source for
the clock, Y502 a low jitter Valpey Fisher clock oscillator can be
placed and used as the clock source. If using Y502, a jumper
must be placed on Header P501.
PDWN
To enable the power-down feature, add a shorting jumper across
P101 at Pin 1 and Pin 2 to connect the PDWN pin to AVDD.
Switching Power Supply
The ADC on the AD9644 evaluation board can be configured to
use the ADP2114 dual switching power supply to provide power to
the DRVDD and AVDD rails of the ADC. To configure the board
to operate from the ADP2114, the following changes must be
incorporated (see the AD9644 Evaluation Board Schematics and
Artwork and Bill of Materials sections for specific recommenda-
tions for part values):
1. Install R204 and R221 to enable the ADP2114.
2. Install R216 and R218.
3. Install L201 and L202.
4. Remove JP201 and JP203 and install JP202 and JP204.
5. Remove E205 and E207 and install E208 and E209.
The ADC on the AD9641 evaluation board can be configured
to use the ADP2108 switching power supply to provide power
to the DRVDD and AVDD rails of the ADC. To configure the
board to operate from the ADP2108, the following changes
must be incorporated (see the AD9641 Evaluation Board
Schematics and Artwork and Bill of Materials sections for
specific recommendations for part values):
1. Install R204 to enable the ADP2108.
2. Install L201 and L202.
3. Remove JP201 and JP203 and install JP202 and JP204.
4. Remove E205 and E207 and install E208 and E209.
Making these changes enables the switching converter to power
the ADC. Using the switching converter as the ADC power source
is more efficient than using the default LDOs.