Datasheet

Evaluation Board User Guide UG-294
Rev. B | Page 3 of 48
EVALUATION BOARD HARDWARE
The AD9644 and AD9641 evaluation boards provide all of the
support circuitry required to operate the parts in various modes
and configurations. Figure 2 shows the typical bench characteri-
zation setup used to evaluate the ac performance of the AD9644
or AD9641. It is critical that the signal sources used for the analog
input and clock have very low phase noise (<1 ps rms jitter) to
realize the optimum performance of the signal chain. Proper
filtering of the analog input signal to remove harmonics and lower
the integrated or broadband noise at the input is necessary to
achieve the specified noise performance. The AD9644 evaluation
board supports dual-channel operation for the AD9644. The
AD9641 evaluation board supports single-channel operation for
the AD9641.
See the Evaluation Board Software Quick Start Procedures section
to get started, and see Figure 17 to Figure 40 for the complete
schematics and layout diagrams. These diagrams demonstrate
the routing and grounding techniques that should be applied at
the system level when designing application boards using these
converters.
POWER SUPPLIES
Each evaluation board is supplied with a wall-mountable
switching power supply that provides a 6 V, 2 A maximum
output. Connect the supply to an ac wall outlet of 100 V to
240 V at a frequency of 47 Hz to 63 Hz. The output from the
supply is provided through a 2.1 mm inner diameter jack that
connects to the printed circuit board (PCB) at P201. In the default
configuration, the 6 V supply is fused and conditioned on the
PCB before connecting to the low dropout linear regulators that
supply the proper bias to each of the various sections on the board.
The evaluation board can be powered in a nondefault condition
using multiple external bench power supplies to bias each section
of the board individually. To do this, remove the E202, E204, E205,
and E207 ferrite beads—as well as the E201 ferrite bead for the
AD9644—from the evaluation board to disconnect the outputs
from the on-board LDOs. Then, use P202 and P203 to connect
a different supply for each section. A 1.8 V supply is needed with a
1 A current capability for DUT_AVDD and DRVDD; however,
it is recommended that separate supplies be used for the analog
domain and the digital domain. An additional supply (DVDD)
is also required to supply 1.8 V for digital support circuitry on
the board. This supply should also have a 1 A current capability
and can be combined with DRVDD without significantly
degrading performance.
To operate the evaluation board using the SPI and the alternate
clocking options, a separate 3.3 V analog supply is needed in
addition to the other supplies. This 3.3 V supply, or 3P3V_
ANALOG, should have a 1 A current capability and is used to
support the clocking circuitry. On the AD9641 evaluation board,
the 3.3 V supply is also used to support the optional input path
amplifier (ADL5562). An additional supply (5V_SUPPORT) is
used on the AD9644 evaluation board to bias the optional dual
input path amplifier (AD8376) on Channel A and Channel B. If
used, these supplies should each have a 1 A current capability.
INPUT SIGNALS
When connecting the clock and analog source, use signal
generators with low phase noise, such as the Rohde & Schwarz
SMA or HP 8644B signal generators, or an equivalent. Use a
1 m, shielded, RG-58, 50 Ω coaxial cable for connecting the
signal generators to the evaluation board. Enter the desired
frequency and amplitude (see the Specifications section in the
data sheet of the respective part). When connecting the analog
input source, use of a multi-pole, narrow-band band-pass filter
with 50 Ω terminations is recommended. Analog Devices, Inc.,
uses TTE and K&L Microwave, Inc., band-pass filters. The
filters should be connected directly to the evaluation board.
If an external clock source is used, it should also be supplied
using a signal generator with low phase noise. Typically, most
Analog Devices evaluation boards can accept ~2.8 V p-p or
13 dBm sine wave input for the clock.
OUTPUT SIGNALS
The default setup uses the Analog Devices high speed converter
evaluation platform (FIFO-GX FPGA) for data capture. The
output signals from Channel A and Channel B are routed
through P601 to the FPGA on the data capture board.