Datasheet

AD9613 Data Sheet
Rev. C | Page 8 of 36
SWITCHING SPECIFICATIONS
Table 4.
AD9613-170 AD9613-210 AD9613-250
Parameter Temp Min Typ Max Min Typ Max Min Typ Max Unit
CLOCK INPUT PARAMETERS
Input Clock Rate Full 625 625 625 MHz
Conversion Rate
1
Full 40 170 40 210 40 250 MSPS
CLK Period, Divide-by-1 Mode (t
CLK
) Full 5.8 4.8 4 ns
CLK Pulse Width High (t
CH
)
Divide-by-1 Mode, DCS Enabled Full 2.61 2.9 3.19 2.16 2.4 2.64 1.8 2.0 2.2 ns
Divide-by-1 Mode, DCS Disabled Full 2.76 2.9 3.05 2.28 2.4 2.52 1.9 2.0 2.1 ns
Divide-by-2 Mode Through Divide-by-8 Mode Full 0.8 0.8 0.8 ns
Aperture Delay (t
A
) Full 1.0 1.0 1.0 ns
Aperture Uncertainty (Jitter, t
J
)
Full
0.1
0.1
0.1
ps rms
DATA OUTPUT PARAMETERS
LVDS Mode
Data Propagation Delay (t
PD
) Full 6.0 6.0 6.0 ns
DCO Propagation Delay (t
DCO
) Full 6.7 6.7 6.7 ns
DCO to Data Skew (t
SKEW
) Full 0.4 0.7 1.0 0.4 0.7 1.0 0.4 0.7 1.0 ns
Pipeline Delay (Latency) Full 10 10 10 Cycles
Aperture Delay (t
A
) Full 1.0 1.0 1.0 ns
Aperture Uncertainty (Jitter, t
J
) Full 0.1 0.1 0.1 ps rms
Wake-Up Time (from Standby)
Full
10
10
10
µs
Wake-Up Time (from Power Down) Full 250 250 250 µs
Out-of-Range Recovery Time Full 3 3 3 Cycles
1
Conversion rate is the clock rate after the divider.