Datasheet

AD9601
Rev. 0 | Page 7 of 32
TIMING DIAGRAMS
CLK+
DCO+
N
CLK–
DAX N – 6 N – 5 N – 4 N – 3 N – 2 N – 1 N N + 1 N + 2N – 7
DCO–
N + 5
N + 6
N + 7
N + 8
N + 4
N + 3
N + 2
N + 1
t
A
t
PD
t
SKEW
t
CPD
t
CLK
= 1/ f
CLK
07100-042
Figure 2. Single Port Mode
CLK+
DCO–
N
N – 6
N – 5
N – 4
N – 3
N – 2
N – 1
N
N + 1
N + 2
N – 7
CLK–
DCO+
DAX
DBX
N + 1
N + 8
N + 7
N + 6
N + 5
N + 4
N + 3
N + 2
t
CPDA
t
SKEWB
t
PDB
t
CPDB
t
PDA
t
SKEWA
t
A
t
CLK
= 1/ f
CLK
07100-043
Figure 3. Interleaved Mode