Datasheet
AD9601
Rev. 0 | Page 25 of 32
EVALUATION BOARD
ADT1-1WT
PRI SEC
nc
ETC1-1-13
PRI SEC
IN OUT
EVQ-Q2
ETC1-1-13
PRI SEC
0.1UF
VOLT_CONTROL
VCLK
TRI_STATE
GND
NC
OUTPUT
A1
A10
A2
A3
A4
A5
A6
A7
A8
A9
B1
B10
B2
B3
B4
B5
B6
B7
B8
B9
C1
C10
C2
C3
C4
C5
C6
C7
C8
C9
D1
D10
D2
D3
D4
D5
D6
D7
D8
D9
GNDAB1
GNDAB10
GNDAB2
GNDAB3
GNDAB4
GNDAB5
GNDAB6
GNDAB7
GNDAB8
GNDAB9
GNDCD1
GNDCD10
GNDCD2
GNDCD3
GNDCD4
GNDCD5
GNDCD6
GNDCD7
GNDCD8
GNDCD9
HEADERM1469169_1
A1
A10
A2
A3
A4
A5
A6
A7
A8
A9
B1
B10
B2
B3
B4
B5
B6
B7
B8
B9
C1
C10
C2
C3
C4
C5
C6
C7
C8
C9
D1
D10
D2
D3
D4
D5
D6
D7
D8
D9
GNDAB1
GNDAB10
GNDAB2
GNDAB3
GNDAB4
GNDAB5
GNDAB6
GNDAB7
GNDAB8
GNDAB9
GNDCD1
GNDCD10
GNDCD2
GNDCD3
GNDCD4
GNDCD5
GNDCD6
GNDCD7
GNDCD8
GNDCD9
HEADERM1469169_1
AIN
AINB
AVDD_CLK
AVDD_CLK1
AVDD_FL
AVDD_FL1
AVDD_PIPE
AVDD_PIPE1
AVDD_PIPE2
AVDD_PIPE3
AVDD_PIPE4
AVDD_PIPE5
AVDD_REF
CLK
CLKB
CML
D0
D0B
D1
D10
D10B
D11
D11B
D1B
D2
D2B
D3
D3B
D4
D4B
D5B
D6
D6B
D7
D7B
D8
D8B
D9
D9B
DCO
DCOB
DGND
DGND1
DGND2
DOR
DORB
DVDD
DVDD1
DVDD2
PAD
PDN
RBIAS
RESETB
SPCSB
SPSCLK/DFS
SPSDIO/DCS
D5
PRI SEC
nc
50_OHMS
50_OHMS
Alternate Options
DNP
optional
ENCODE
CR2 TO MAKE LAYOUT AND PARASITIC LOADING SYMMETRICAL
ANALOG
Input
CVHD_956 Crystek Crystal
U6
OPTIONAL ENCODE CIRCUITS
D1
D1B
D0
D0B
DCOB
DCO
D2B
D2
9
10
12
13
14
15
2
3
4
5
6
7
8
1
16
11
RN3
9
10
12
13
14
152
3
4
5
6
7
8
116
11
RN2
9
10
12
13
14
15
2
3
4
5
6
7
8
1
16
11
D9B
D9
D10B
D10
D11B
D11
DORB
D10B
DORB
DOR
D10
9
10
12
13
14
152
3
4
5
6
7
8
116
11
CMLX
1
2
34
5
6
T3
ADT1-1WT
35
36
43
46
42
41
39
38
37
34
33
32
30
44
45
40
52
51
54
18
17
20
19
53
56
55
2
1
4
3
5
10
9
12
11
14
13
16
15
50
49
8
23 48
22
21
7
24 47
57
29
31
28
27
26
25
6
U4
AD9601_CSP
C17 DNP
R9
DNP
AMPOUT-
AMPOUT+
TOUT
TOUTB
0.1UF
C21
GND
00
R90
00
R89
00
R8
R1
50
D1B
D1
GND
10K
R12
L8
0
L9
0
R6
36
R5
36
R7
33
DNP
R4
R16
33
CSB1_CHA
1
10
2
3
4
5
6
7
8
9
11
20
12
13
14
15
16
17
18
19
31
40
32
33
34
35
36
37
38
39
41
50
42
43
44
45
46
47
48
49
21
30
22
23
24
25
26
27
28
29
51
60
52
53
54
55
56
57
58
59
SDO_CHA
SDI_CHA
SCLK_CH
A
1
10
2
3
4
5
6
7
8
9
11
20
12
13
14
15
16
17
18
19
31
40
32
33
34
35
36
37
38
39
41
50
42
43
44
45
46
47
48
49
21
30
22
23
24
25
26
27
28
29
51
60
52
53
54
55
56
57
58
59
P7
CONNECTS TO J2
P17
GND
P5
P9
GND
0.1UF
C75
R17
0 DNP
VOLT_CONTROL
C74
0.1UF
GND
1
6
2
3
5
4
E20
C61
0.1UF
E19
0
R87
XTALINPUT
50
R3
C15
R86
10K
R85
10K
J3
J4
J2
R13
1K
R10
1K
1
3
2
CR3
1
3
2
CR2
CSB
GND
VSPI
E10
E5
E4
DNP
R15
E7
E6
1
34
2
5
T6
12
SW3
C22
0.1UF
C20
DNP
0.1UF
C23
DNP
R14
R11
1K
E9
L1
10NH
0.1UF
C19
0.1UF
C18
E8
0.1UF
C16
1
3
4
2
5
T5
1
2
34
5
6
T2
E3
E2
E1
P4
P3
P2
P1
CML
GND
GND
CLKCT
CLKCT
GND
AVDD
CML CML
SDIO_ODM
SCLK_DTP
TOUTBTINB
TOUTGND
GND
VSPI
GND
GND
GND
VSPI
GND
E33
E32
E31
CSB_DUT
VSPI
CSB
GND
DRVDD
DRVDD
DRVDD
GND
GND
GND
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
E18
GND
VCLK
GND
GND
GND
VCLK
XTALINPUT
VCLK
GND
GND
GND
GND
GND
P16
P10
GND
GND
GND
D8B
D6B
D4B
D2B
D0B
D0
D2
D4
D6
D8
D11B
D9B
D7B
D5B
D3B
D3
D5
D7
D9
D11
DCOBDCO
GND
CLK
CLK
GND
TINB
CML
CML
GND
GND
GND
GND
GND
GND
DOR
D8B
D8
D7B
D7
D6B
D6
D5
D5B
D4B
D4
D3B
D3
P11
CONNECTS TO J1
RN1
50_OHMS
RN4
50_OHMS
07100-045
Figure 45. AD9601 Evaluation Board Schematic Page 1