Datasheet

AD9601
Rev. 0 | Page 11 of 32
EQUIVALENT CIRCUITS
1.2V
10kΩ 10kΩ
CLK+
CLK–
AVDD
07100-003
Figure 5. Clock Inputs
V
IN+
AVDD
BUF
VIN–
AVDD
BUF
2kΩ
2kΩ
BUF
AVDD
V
CML
~1.4V
0
7100-004
Figure 6. Analog Inputs (V
CML
= ~1.4 V)
SCLK/DFS
RESET
PDWN
1kΩ
30kΩ
07100-005
Figure 7. Equivalent SCLK/DFS, RESET, PDWN Input Circuit
C
SB
1kΩ
26kΩ
AVDD
07100-006
Figure 8. Equivalent CSB Input Circuit
0
7100-044
DR
V
DD
DRGND
Figure 9. CMOS Outputs (Dx, OVRA, OVRB, DCO+, DCO−)
SDIO/DCS
1kΩ
DRVDD
07100-007
Figure 10. Equivalent SDIO/DCS Input Circuit