Datasheet

AD9572
Rev. B | Page 14 of 20
2ns/DIV
200mV/DI
V
07498-027
Figure 15. 156.25 MHz LVPECL Output, Differential Plot, 200 Ω Termination
to GND on Evaluation Board, AC-Coupled via 0.1 μF Capacitors to
Oscilloscope Set to 50 Ω Input Termination
2ns/DIV
100mV/DI
V
07498-028
Figure 16. 125 MHz LVDS Output, Differential Plot, AC-Coupled via 0.1 μF
Capacitors to Oscilloscope Set to 50 Ω Input Termination