Datasheet

AD9559 Data Sheet
Rev. C | Page 86 of 120
Table 84. Distribution OUT0A Settings
Address Bits Bit Name Description
0x0427 7 Reserved Default: 0b
[6:4]
OUT0A format
Selects the operating mode of OUT0A.
000 = power-down, tristate.
001 (default) = HSTL.
010 = LVDS.
011 = reserved.
100 = CMOS, both outputs active.
101 = CMOS, P output active, N output power-down.
110 = CMOS, N output active, P output power-down.
111 = reserved.
[3:2] OUT0A polarity Controls the OUT0A polarity.
00 (default) = positive, negative.
01 = positive, positive.
10 = negative, positive.
11 = negative, negative.
1 OUT0A LVDS boost Controls the output drive capability of OUT0A.
0 (default) = LVDS: 3.5 mA drive strength.
1 = LVDS: 4.5 mA drive strength (LVDS boost mode).
0 Reserved Default: 0b.
Table 85. Q0_A Divider Settings
Address Bits Bit Name Description
0x0428 [7:0] Q0_A divider 10-bit channel divider, Bits[7:0] (LSB).
Division equals channel divider, Bits[9:0] + 1.
([9:0] = 0 is divide-by-1, [9:0] = 1 is divide-by-2…[9:0] = 1023 is divide-by-1024)
0x0429 [7:2] Reserved Reserved.
[1:0] Q0_A divider 10-bit channel divider, Bits[9:8] (MSB), Bits[1:0].
0x042A [7:6] Reserved Reserved.
[5:0] Q0_A divider phase Divider initial phase after sync relative to the divider input clock (from the P0 divider output).
LSB is ½ of a period of the divider input clock.
Phase = 0 is no phase offset.
Phase = 1 is ½ a period offset.
Table 86. Distribution OUT0B Settings
Address Bits Bit Name Description
0x042B 7 Enable 3.3 V CMOS driver 0 (default) = disables 3.3 V CMOS driver. OUT0B logic is controlled by Register 0x042B[6:4].
1 = enables 3.3 V CMOS driver as operating mode of OUT0B.
This bit should be enabled only if Bits[6:4] are in CMOS mode.
[6:4] OUT0B format Select the operating mode of OUT0B.
000 = power-down, tristate.
001 = HSTL.
010 = LVDS.
011 = reserved.
100 = CMOS, both outputs active.
101 = CMOS, P output active, N output power-down.
110 = CMOS, N output active, P output power-down.
111 = reserved.
[3:2] OUT0B polarity Configure the OUT0B polarity in CMOS mode. These bits are active in CMOS mode only.
00 (default) = positive, negative.
01 = positive, positive.
10 = negative, positive.
11 = negative, negative.
1
OUT0B LVDS boost
Controls the output drive capability of OUT0B.
0 (default) = LVDS: 3.5 mA drive strength.
1 = LVDS: 4.5 mA drive strength (LVDS boost mode).
0
Reserved
Default: 0b.