Datasheet

Data Sheet AD9559
Rev. C | Page 63 of 120
Reg
Addr
(Hex)
Opt Name D7 D6 D5 D4 D3 D2 D1 D0
Def
(Hex)
0x0427 OUT0A Reserved OUT0A format, Bits[2:0] OUT0A polarity, Bits[1:0] OUT0A
LVDS boost
Reserved 0x10
0x0428 Q0_A divider, Bits[7:0] 0x00
0x0429 Reserved Q0_A divider, Bits[9:8] 0x00
0x042A Reserved Q0_A divider phase, Bits[5:0] 0x00
0x042B OUT0B Enable 3.3 V
CMOS driver
OUT0B format[2:0] OUT0B polarity, Bits[1:0] OUT0B
LVDS boost
Reserved 0x10
0x042C Q0_B divider, Bits[7:0] 0x03
0x042D Reserved Q0_B divider, Bits[9:8] 0x00
0x042E Reserved Q0_B divider phase, Bits[5:0] 0x00
DPLL_0 Settings for Reference Input A
0x0440 Reference
priority
Reserved REFA priority, Bits[1:0] Enable
REFA
0x01
0x0441 W2 DPLL_0
loop BW
(16 bits)
Digital PLL_0 loop BW scaling factor, Bits[7:0] (default: 0x01F4 = 50 Hz) 0xF4
0x0442 W2 Digital PLL_0 loop BW scaling factor, Bits[15:8] 0x01
0x0443
W2
Reserved
Base filter
Reserved
0x00
0x0444 W2 DPLL_0
N0 divider
(17 bits)
Digital PLL feedback divider—Integer Part N0, Bits[7:0] 0xCB
0x0445
W2
Digital PLL feedback divider—Integer Part N0, Bits[15:8]
0x07
0x0446
W2
Reserved
Digital
PLL
feedback
divider,
Integer
Part N0,
Bit 16
0x00
0x0447 DPLL_0
fractional
feedback
divider
(23 bits)
Digital PLL fractional feedback divider—FRAC0, Bits[7:0] 0x04
0x0448 Digital PLL fractional feedback divider—FRAC0, Bits[15:8] 0x00
0x0449 Reserved Digital PLL fractional feedback divider—FRAC0, Bits[22:16] 0x00
0x044A W2 DPLL_0
fractional
feedback
divider
modulus
(23 bits)
Digital PLL feedback divider modulus—MOD0, Bits[7:0] 0x05
0x044B W2 Digital PLL feedback divider modulus—MOD0, Bits[15:8] 0x00
0x044C W2 Reserved Digital PLL feedback divider modulus—MOD0, Bits[22:16] 0x00
DPLL_0 Settings for Reference Input B
0x044D Reference
priority
Reserved REFB priority, Bits[1:0] Enable
REFB
0x01
0x044E W2 DPLL_0
loop BW
(16 bits)
Digital PLL_0 loop BW scaling factor, Bits[7:0] (default: 0x01F4 = 50 Hz) 0xF4
0x044F W2 Digital PLL_0 loop BW scaling factor, Bits[15:8] 0x01
0x0450 W2 Reserved Base filter Reserved 0x00
0x0451 W2 DPLL_0
N0 divider
(17 bits)
Digital PLL feedback divider—Integer Part N0, Bits[7:0] 0xCB
0x0452 W2 Digital PLL feedback divider—Integer Part N0, Bits[15:8] 0x07
0x0453 W2 Reserved Digital
PLL
feedback
divider,
Integer
Part N0,
Bit 16
0x00
0x0454 DPLL_0
fractional
feedback
divider
(23 bits)
Digital PLL fractional feedback divider—FRAC0, Bits[7:0] 0x04
0x0455 Digital PLL fractional feedback divider—FRAC0, Bits[15:8] 0x00
0x0456 Reserved Digital PLL fractional feedback divider—FRAC0, Bits[22:16] 0x00
0x0457 W2 DPLL_0
fractional
feedback
divider
modulus
(23 bits)
Digital PLL feedback divider modulus—MOD0, Bits[7:0] 0x05
0x0458 W2 Digital PLL feedback divider modulus—MOD0, Bits[15:8] 0x00
0x0459 W2 Reserved Digital PLL feedback divider modulus—MOD0, Bits[22:16] 0x00