Datasheet

AD9559 Data Sheet
Rev. C | Page 60 of 120
Reg
Addr
(Hex)
Opt Name D7 D6 D5 D4 D3 D2 D1 D0
Def
(Hex)
System Clock
0x0200 SYSCLK PLL
feedback
divider and
config
System clock K divider, Bits[7:0] 0x08
0x0201 Reserved SYSCLK
XTAL enable
SYSCLK J1 divider, Bits[1:0] SYSCLK
doubler
enable
(J0 divider)
0x09
0x0202 SYSCLK
period
Nominal system clock period (fs), Bits[7:0] (1 ns at 1 ppm accuracy) 0x0E
0x0203 Nominal system clock period (fs), Bits[15:8] (1 ns at 1 ppm accuracy) 0x67
0x0204 Reserved Nominal system clock period, Bits[20:16] 0x13
0x0205 W6 SYSCLK
stability
System clock stability period (ms), Bits[7:0] 0x32
0x0206 W6 System clock stability period (ms), Bits[15:8] 0x00
0x0207 W6 Reserved System clock stability period (ms), Bits[19:16] 0x00
Reference Input A
0x0300 REFA
logic type
Reserved Enable REFA
divide-by-2
Reserved REFA logic type, Bits[1:0] 0x00
0x0301 REFA
R divider
(20 bits)
R divider, Bits[7:0] 0xCF
0x0302 R divider, Bits[15:8] 0x00
0x0303 Reserved R divider, Bits[19:16] 0x00
0x0304 W0 REFA
period
(up to
1.1 ms)
Nominal period (fs), Bits[7:0] (default: 51.44 ns =1/(19.44 MHz) for default system clock setting) 0xC9
0x0305 W0 Nominal period (fs), Bits[15:8] 0xEA
0x0306 W0 Nominal period (fs), Bits[23:16] 0x10
0x0307 W0 Nominal period (fs), Bits[31:24] 0x03
0x0308 W0 Nominal period (fs), Bits[39:32] 0x00
0x0309 W0 REFA
frequency
tolerance
Inner tolerance (1 ÷ ppm), Bits[7:0] (for unlock to lock condition; max: 10%, min: 2 ppm) (default: 5%) 0x14
0x030A W0 Inner tolerance (1 ÷ ppm), Bits[15:8] (for unlock to lock condition; max: 10%, min: 2 ppm) 0x00
0x030B W0 Reserved Inner tolerance, Bits[19:16] 0x00
0x030C W0 Outer tolerance (1 ÷ ppm), Bits[7:0] (for lock to unlock; max: 10%, min: 2 ppm) (default: 10%) 0x0A
0x030D W0 Outer tolerance (1 ÷ ppm), Bits[15:8] (for lock to unlock; max: 10%, min: 2 ppm) 0x00
0x030E W0 Reserved Outer tolerance, Bits[19:16] 0x00
0x030F
W0
REFA
validation
Validation timer (ms), Bits[7:0] (up to 65.5 sec)
0x0A
0x0310 W0 Validation timer (ms), Bits[15:8] (up to 65.5 sec) 0x00
0x0311
W1
REFA
phase lock
detector
Phase lock threshold (ps), Bits[7:0]
0xBC
0x0312
W1
Phase lock threshold (ps), Bits[15:8]
0x02
0x0313 W1 Phase lock threshold (ps), Bits [23:16] 0x00
0x0314
W1
Phase lock fill rate, Bits[7:0]
0x0A
0x0315 W1 Phase lock drain rate, Bits[7:0] 0x0A
0x0316
W1
REFA
frequency
lock
detector
Frequency lock threshold, Bits[7:0]
0xBC
0x0317 W1 Frequency lock threshold, Bits[15:8] 0x02
0x0318 W1 Frequency lock threshold, Bits[23:16] 0x00
0x0319 W1 Frequency lock fill rate, Bits[7:0] 0x0A
0x031A W1 Frequency lock drain rate, Bits[7:0] 0x0A
Reference Input B
0x0320 REFB
logic type
Reserved Enable REFB
divide-by-2
Reserved REFB logic type, Bits[1:0] 0x00
0x0321 REFB
R divider
(20 bits)
R divider, Bits[7:0] 0xCF
0x0322 R divider, Bits[15:8] 0x00
0x0323 Reserved R divider, Bits[19:16] 0x00
0x0324 W0 REFB
reference
period
(up to
1.1 ms)
Nominal period (fs), Bits[7:0] (default: 51.44 ns =1/(19.44 MHz) for default system clock setting) 0xC9
0x0325 W0 Nominal period (fs), Bits[15:8] 0xEA
0x0326 W0 Nominal period (fs), Bits[23:16] 0x10
0x0327 W0 Nominal period (fs), Bits[31:24] 0x03
0x0328 W0 Nominal period (fs), Bits[39:32] 0x00
0x0329 W0 REFB
frequency
tolerance
Inner tolerance (1 ÷ ppm), Bits[7:0] (for unlock to lock condition; max: 10%, min: 2 ppm) (default: 5%) 0x14
0x032A W0 Inner tolerance (1 ÷ ppm), Bits[15:8] (for unlock to lock condition; max: 10%, min: 2 ppm) 0x00
0x032B W0 Reserved Inner tolerance, Bits[19:16] 0x00
0x032C W0 Outer tolerance (1 ÷ ppm), Bits[7:0] (for lock to unlock; max: 10%, min: 2 ppm) (default: 10%) 0x0A
0x032D W0 Outer tolerance (1 ÷ ppm), Bits[15:8] (for lock to unlock; max: 10%, min: 2 ppm) 0x00
0x032E W0 Reserved Outer tolerance, Bits[19:16] 0x00