Datasheet

Data Sheet AD9559
Rev. C | Page 47 of 120
The condition is a 4-bit value with 16 possibilities. Condition = 0
is the null condition. When the null condition is in effect, the
EEPROM controller executes all instructions unconditionally.
The remaining 15 possibilities, condition = 1 through condition =
15, modify the EEPROM controller’s handling of a download
sequence. The condition originates from one of two sources
(see Figure 44), as follows:
• FncInit, Bits[1:0], which is the state of the M1 and M0
multifunction pins at power-up (see Table 23)
(Note that only Condition 1 through Condition 3 are
accessible via the M pins.)
• Register 0x0E01, Bits[3:0]
If Register 0x0E01, Bits[3:0] ≠ 0, then the condition is the value
stored in Register 0x0E01, Bits[3:0]; otherwise, the condition is
FncInit, Bits[1:0]. Note that a nonzero condition present in
Register 0x0E01, Bits[3:0], takes precedence over FncInit,
Bits[1:0].
The condition tag board is a table that is maintained by the
EEPROM controller. When the controller encounters a condition
instruction, it decodes the 0xB1 through 0xBF instructions as
condition = 1 through condition = 15, respectively, and tags that
particular condition in the condition tag board. However, the 0xB0
condition instruction decodes as the null condition, for which the
controller clears the condition tag board, and subsequent download
instructions execute unconditionally (until the controller
encounters a new condition instruction).
During download, the EEPROM controller executes or skips
instructions depending on the value of the condition and the
contents of the condition tag board. Note, however, that
condition instructions and the end instruction always execute
unconditionally during download. If condition = 0, then all
instructions during download execute unconditionally. If
condition ≠ 0 and there are any tagged conditions in the
condition tag board, then the controller executes instructions
only if the condition is tagged. If the condition is not tagged,
then the controller skips instructions until it encounters a
condition instruction that decodes as a tagged condition. Note
that the condition tag board allows for multiple conditions to be
tagged at any given moment. This conditional processing
mechanism enables the user to have one download instruction
sequence with many possible outcomes depending on the value
of the condition and the order in which the controller
encounters condition instructions.
Table 24 lists a sample EEPROM download instruction sequence.
It illustrates the use of condition instructions and how they alter
the download sequence. The table begins with the assumption
that no conditions are in effect. That is, the most recently executed
condition instruction is 0xB0 or no conditional instructions
have been processed.
Table 24. EEPROM Conditional Processing Example
Instruction Action
0x08,
0x01,
0x00
Transfer the system clock register contents
regardless of the current condition.
0xB1 Tag Condition 1
0x19,
0x04,
0x00
Transfer the clock distribution register contents
only if tag condition = 1
0xB2 Tag Condition 2
0xB3 Tag Condition 3
0x07,
0x05,
0x00
Transfer the reference input register contents only
if tag condition = 1, 2, or 3
0x0A Calibrate the system clock only if tag condition =
1, 2, or 3
0xB0 Clear the tag condition tag board
0x80
Execute an IO_UPDATE, regardless of the value of
the tag condition
0x0A Calibrate the system clock regardless of the value
of the tag condition
Storing Multiple Device Setups in EEPROM
Conditional processing makes it possible to create a number of
different device setups, store them in EEPROM, and download
a specific setup on demand. To do so, first program the device
control registers for a specific setup. Then, store an upload
sequence in the EEPROM scratchpad with the following general
form:
1. Condition instruction (0xB1 to 0xBF) to identify the setup
with a specific condition (1 to 15)
2. Data instructions (to save the register contents) along with
any required calibrate and/or IO_UPDATE instructions
3. Pause instruction (0xFE)
With the upload sequence written to the scratchpad, set the
write enable bit (Register 0x0E00, Bit 0) and perform an
EEPROM upload (Register 0x0E02, Bit 0).
Reprogram the device control registers for the next desired
setup. Then store a new upload sequence in the EEPROM
scratchpad with the following general form:
1. Condition instruction (0xB0)
2. The next desired condition instruction (0xB1 to 0xBF, but
different from the one used during the previous upload to
identify a new setup)
3. Data instructions (to save the register contents) along with
any required calibrate and/or IO_UPDATE instructions
4. Pause instruction (0xFE)
With the upload sequence written to the scratchpad, perform an
EEPROM upload (Register 0x0E02, Bit 0).