Datasheet

AD9559 Data Sheet
Rev. C | Page 20 of 120
TYPICAL PERFORMANCE CHARACTERISTICS
f
R
= input reference clock frequency; f
OUT
= output clock frequency; f
SYS
= SYSCLK input frequency; VDD3 and VDD at nominal supply voltage.
Absolute Phase Noise (Output Driver = HSTL),
f
R
= 19.44 MHz, f
OUT
= 156.25 MHz,
DPLL Loop BW = 50 Hz, f
SYS
= 49.152 MHz Crystal
Figure 3. Absolute Phase Noise (Output Driver = HSTL),
f
R
= 19.44 MHz, f
OUT
= 622.08 MHz,
DPLL Loop BW = 50 Hz, f
SYS
= 49.152 MHz Crystal
Figure 4. Absolute Phase Noise (Output Driver = HSTL),
f
R
= 19.44 MHz, f
OUT
= 644.53125 MHz,
DPLL Loop BW = 50 Hz, f
SYS
= 49.152 MHz Crystal
Figure 5. Absolute Phase Noise (Output Driver = HSTL),
f
R
= 19.44 MHz, f
OUT
= 693.482991 MHz,
DPLL Loop BW = 50 Hz, f
SYS
= 49.152 MHz Crystal
–160
–150
–140
–130
–120
–
1
10
–100
–90
–80
–70
–60
1k
10
100
10k
100k
1M
10M 100M
PHASE NOISE (dBc/Hz)
FREQUENCY
OFFSET (Hz)
INTEGR
ATED RMS JITTER
(12kHz
TO 20MHz): 331fs
PHASE NOISE (dBc/Hz):
OFFSET
LEVEL
10Hz
–75
100Hz
–92
1kHz
–116
10kHz
–126
100kHz
–130
1MHz
–143
10MHz
–152
FLOOR
–158
10644-300
–160
–150
–140
–130
–120
–110
–100
–90
–80
–70
–60
1k
10
100
10k
100k
1M 10M
100M
PHASE NOISE (dBc/Hz)
FREQUENCY
OFFSET (Hz)
INTEGR
A
TED RMS JITTER
(12kHz
T
O 20MHz): 310fs
PHASE NOISE (dBc/Hz):
OFFSET
LEVEL
10Hz
–71
100Hz –82
1kHz
–105
10kHz
–114
100kHz –117
1MHz –133
10MHz –142
FLOOR –153
10644-003
–160
–150
–140
–130
–120
–
1
10
–100
–90
–80
–70
–60
PHASE NOISE (dBc/Hz)
FREQUENC
Y
OFFSET (Hz)
1k
10
100
10k
100k
1M 10M
100M
INTEGR
A
TED RMS JITTER
(12kHz
T
O 20MHz): 306fs
PHASE NOISE (dBc/Hz):
10Hz
–70
100Hz
–86
1kHz –105
10kHz
–114
100kHz
–117
1MHz
–134
10MHz
–141
FLOOR –153
10644-004
–160
–150
–140
–130
–120
–110
–100
–90
–80
–70
–60
PHASE NOISE (dBc/Hz)
FREQUENCY OFFSET (Hz)
1k10 100 10k 100k 1M 10M 100M
INTEGRATED RMS JITTER
(12kHz TO 20MHz): 328fs
PHASE NOISE (dBc/Hz):
OFFSET LEVEL
10Hz –70
100Hz –85
1kHz –105
10kHz –112
100kHz –115
1MHz –133
10MHz –142
10644-005