Datasheet

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AD9559 Data Sheet

Rev. C | Page 2 of 120

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 3

Specifications ..................................................................................... 4

Supply Voltage ............................................................................... 4

Supply Current .............................................................................. 4

Power Dissipation ......................................................................... 5

System Clock Inputs (XOA, XOB) ............................................. 5

Reference Inputs ........................................................................... 6

Reference Monitors ...................................................................... 7

Reference Switchover Specifications .......................................... 7

Distribution Clock Outputs ........................................................ 8

Time Duration of Digital Functions ........................................ 10

Digital PLL (DPLL_0 and DPLL_1) ........................................ 10

Analog PLL (APLL_0 and APLL_1) ........................................ 10

Digital PLL Lock Detection ...................................................... 10

Holdover Specifications ............................................................. 10

Serial Port Specifications—SPI Mode ...................................... 11

Serial Port Specifications—I

C Mode ...................................... 12

Logic Inputs (

RESET

, M5 to M0) ............................................. 12

Logic Outputs (M5 to M0) ........................................................ 12

Jitter Generation ......................................................................... 13

Absolute Maximum Ratings .......................................................... 16

ESD Caution ................................................................................ 16

Pin Configuration and Function Descriptions ........................... 17

Typical Performance Characteristics ........................................... 20

Input/Output Termination Recommendations .......................... 26

Getting Started ................................................................................ 27

Chip Power Monitor and Startup ............................................. 27

Multifunction Pins at Reset/Power-Up ................................... 27

Device Register Programming Using a Register Setup File .. 27

Theory of Operation ...................................................................... 31

Overview ...................................................................................... 31

Reference Input Physical Connections .................................... 32

Reference Monitors .................................................................... 32

Reference Input Block ................................................................ 32

Reference Switchover ................................................................. 33

Digital PLL (DPLL) Core .......................................................... 34

Loop Control State Machine ..................................................... 36

System Clock (SYSCLK) ................................................................ 37

SYSCLK Inputs ........................................................................... 37

SYSCLK Multiplier ..................................................................... 37

Output PLL (APLL) ....................................................................... 39

APLL Configuration .................................................................. 39

APLL Calibration ....................................................................... 39

Clock Distribution .......................................................................... 40

Clock Dividers ............................................................................ 40

Output Enable ............................................................................. 40

Output Mode and Power-Down .............................................. 40

Clock Distribution Synchronization ........................................ 41

Status and Control .......................................................................... 42

Multifunction Pins (M0 to M5) ............................................... 42

IRQ Function .............................................................................. 42

Watchdog Timer ......................................................................... 43

EEPROM ..................................................................................... 43

Serial Control Port ......................................................................... 49

SPI/I²C Port Selection ................................................................ 49

SPI Serial Port Operation .......................................................... 49

I²C Serial Port Operation .......................................................... 53

Programming the I/O Registers ................................................... 56

Buffered/Active Registers .......................................................... 56

Write Detect Registers ............................................................... 56

Autoclear Registers ..................................................................... 56

Thermal Performance .................................................................... 57

Power Supply Partitions ................................................................. 58

3.3 V Supplies .............................................................................. 58

1.8 V Supplies .............................................................................. 58

Bypass Capacitors for Pin 21 and Pin 33 ................................. 58

Serial Control Port Configuration (Register 0x0000 to

Clock Part Family ID (Register 0x000C and Register 0x000D) 72

User Scratchpad (Register 0x000E and Register 0x000F) ..... 73

General Configuration (Register 0x0100 to Register 0x0109) .. 73

IRQ Mask (Register 0x010A to Register 0x112) .................... 74