Datasheet
AD9559 Data Sheet
Rev. C | Page 102 of 120
Table 149. Reference Input Monitor Bypass
Address Bits Bit Name Description
0x0A04 [7:4] Reserved Default: 0x0
3 REFD monitor bypass Bypasses REFD input receiver frequency monitor
0 (default) = REFD frequency monitor not bypassed
1 = REFD frequency monitor bypassed
2 REFC monitor bypass Bypasses REFC input receiver frequency monitor
0 (default) = REFC frequency monitor not bypassed
1 = REFC frequency monitor bypassed
1 REFB monitor bypass Bypasses REFB input receiver frequency monitor
0 (default) = REFB frequency monitor not bypassed
1 = REFBB frequency monitor bypassed
0 REFA monitor bypass Bypasses REFA input receiver frequency monitor
0 (default) = REFA frequency monitor not bypassed
1 = REFA frequency monitor bypassed
IRQ Clearing (Register 0x0A05 to Register 0x0A0E)
The IRQ clearing registers are identical in format to the IRQ monitor registers (Register 0x0D08 to Register 0x0D10). When set to Logic 1,
an IRQ clearing bit resets the corresponding IRQ monitor bit, thereby cancelling the interrupt request for the indicated event. The IRQ
clearing registers are autoclearing.
Table 150. IRQ Clearing of Groups
Address Bits Bit Name Description
0x0A05 7 Clear watchdog timer Clears watchdog timer alert
[6:4] Reserved Reserved
3 Clear DPLL_1 IRQs Clears all IRQs associated with DPLL_1
2
Clear DPLL_0 IRQs
Clears all IRQs associated with DPLL_0
1 Clear common IRQs Clears all IRQs associated with common IRQ group
0 Clear all IRQs Clears all IRQs
Table 151. IRQ Clearing for SYSCLK and EEPROM
Address Bits Bit Name Description
0x0A06 7 Reserved Reserved
6 SYSCLK unlocked Clears IRQ indicating a SYSCLK PLL state transition from locked to unlocked
5 SYSCLK stable Clears IRQ indicating that SYSCLK stability time has expired and that the SYSCLK PLL is
considered to be stable.
4 SYSCLK locked Clears IRQ indicating a SYSCLK PLL state transition from unlocked to locked
3 Watchdog timer Clears IRQ indicating expiration of the watchdog timer
2
Reserved
Reserved
1 EEPROM fault Clears IRQ indicating a fault during an EEPROM load or save operation
0 EEPROM complete Clears IRQ indicating successful completion of an EEPROM load or save operation