Datasheet

Data Sheet AD9558
Rev. B | Page 39 of 104
A channel can be programmed to ignore the sync function by
setting the mask Channel x sync bits in Register 0x0500[7:4].
When programmed to ignore the sync, the channel ignores
both the user initiated sync signal and the zero delay initiated
sync signals, and the channel divider starts toggling, provided
that the APLL is calibrated and locked, or if the APLL locked
controlled sync bit (Register 0x0405[3]) is set.
If the output SYNC function is to be controlled using an M pin,
use the following steps:
1. First, enable the M pins by writing Register 0x0200 = 0x01.
2. Issue an I/O update (Register 0x0005 = 0x01).
3. Set the appropriate M pin function.
If this process is not followed, a SYNC pulse is issued
automatically.