Datasheet

AD9553
Rev. A | Page 41 of 44
OUT2 Driver Control (Register 0x34)
Table 39.
Address Bit Bit Name Description
0x34 7 OUT2 drive strength Controls the output drive capability of the OUT2 driver.
0 = weak.
1 = strong (default).
6 OUT2 power-down Controls power-down functionality of the OUT2 driver.
0 = OUT2 active (default).
1 = OUT2 powered down.
[5:3] OUT2 mode control OUT2 driver mode selection.
000 = CMOS, both pins active.
001 = CMOS, positive pin active, negative pin tristate.
010 = CMOS, positive pin tristate, negative pin active.
011 = CMOS, both pins tristate.
100 = LVDS.
101 = LVPECL (default).
110 = not used.
111 = not used.
2 OUT2 CMOS polarity Selects the polarity of the OUT2 pins in CMOS mode. This bit is ineffective unless Bits[5:3]
select CMOS mode. See the Output Driver Polarity (CMOS) section for the definition of
normal and inverted polarity.
0 = positive pin is normal polarity and negative pin is normal polarity (default).
1 = positive pin logic is inverted polarity and negative pin is normal polarity.
1 Unused Unused.
0
OUT1 mode source
Controls OUT2 driver functionality (see Figure 31).
0 = OUT2 mode determined by the OM2 to OM0 pins (default).
1 = OUT2 mode defined by Register 0x34[5:3].