Datasheet

AD9553
Rev. A | Page 40 of 44
OUT1 Driver Control (Register 0x32)
Table 37.
Address Bit Bit Name Description
0x32 7 OUT1 drive strength Controls the output drive capability of the OUT1 driver.
0 = weak.
1 = strong (default).
6 OUT1 power-down Controls power-down functionality of the OUT1 driver.
0 = OUT1 active (default).
1 = OUT1 powered down.
[5:3] OUT1 mode control OUT1 driver mode selection.
000 = CMOS, both pins active.
001 = CMOS, positive pin active, negative pin tristate.
010 = CMOS, positive pin tristate, negative pin active.
011 = CMOS, both pins tristate.
100 = LVDS.
101 = LVPECL (default).
110 = not used.
111 = not used.
2 OUT1 CMOS polarity Selects the polarity of the OUT1 pins in CMOS mode. This bit is ineffective unless Bits[5:3]
select CMOS mode. See the Output Driver Polarity (CMOS) section for the definition of
normal and inverted polarity.
0 = positive pin is normal polarity and negative pin is normal polarity (default).
1 = positive pin logic is inverted polarity and negative pin is normal polarity.
1 Unused Unused.
0
OUT1 mode source
Controls OUT1 driver functionality (see Figure 31).
0 = OUT1 mode determined by the OM2 to OM0 pins (default).
1 = OUT1 mode defined by Register 0x32[5:3].
Reserved (Register 0x33)
Table 38.
Address Bit Bit Name Description
0x33 [7:0] Unused Unused.