Datasheet
AD9553
Rev. A | Page 33 of 44
REGISTER MAP
A bit that is labeled ACLR is an active high, autoclearing bit. When set to a Logic 1 state, the control logic automatically returns it to a
Logic 0 state upon completion of the indicated task.
Table 27. Register Map
Addr.
(Hex)
Register
Name
(MSB)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
(LSB)
Bit 0 Default
0x00 Serial port
control
0 LSB first Soft reset
(ACLR)
1 1 Soft reset LSB first 0 0x18
0x04 Readback
control
Unused Unused Unused Unused Unused Unused Unused Readback
control
0x00
0x05 I/O update Unused Unused Unused Unused Unused Unused Unused I/O update
(ACLR)
0x00
0x0A PLL charge
pump and
PFD control
Charge Pump Current Control[7:0]
(3.5 μA granularity, ~900 μA full scale)
0x80
0x0B Enable SPI
control of
charge
pump
current
Enable SPI
control of
antiback-
lash
period
Charge Pump
Mode[1:0]
Disable
charge
pump
PFD
feedback
input edge
control
PFD
reference
input edge
control
Force VCO
to midpoint
frequency
0x30
0x0C Unused Unused Unused Unused Unused Charge Pump Clock DIV[2:0] 0x00
0x0D Antibacklash Control[1:0] Unused Unused Unused Unused Unused PLL lock
detector
power-
down
0x00
0x0E VCO control Calibrate
VCO (ACLR)
Enable
ALC
ALC Threshold[2:0] Enable SPI
control of
VCO
calibration
Boost VCO
supply
Enable SPI
control of
VCO band
setting
0x70
0x0F VCO Level Control[5:0] Unused Unused 0x80
0x10 VCO Band Control[6:0] Unused 0x80
0x11 PLL and
output
frequency
control
Unused Unused Unused Unused Unused Unused Unused Unused 0x00
0x12 Feedback Divider (N)[19:12] 0x80
0x13 Feedback Divider (N)[11:4] 0x00
0x14 Feedback Divider (N)[3:0] Enable SPI
control of
feedback
divider
Enable SPI
control of
output
dividers
Unused Reset PLL
(ACLR)
0x00
0x15 P
1
Divider[9:2] 0x20
0x16 P
1
Divider[1:0] P
2
Divider[9:4] 0x00
0x17 P
2
Divider[3:0] Enable test
port
Test Mux[1:0] Unused 0x01
0x18 P
0
Divider[2:0] Unused Unused Unused Unused Unused 0x00
0x19 Unused Unused Unused Unused Unused Unused Unused Unused 0x20
0x1A Input
receiver and
band gap
control
Reference
reset (ACLR)
Band Gap Voltage Adjust[4:0]
(00000 = maximum, 11111 = minimum)
Unused Enable SPI
control of
band gap
voltage
0x00
0x1B XTAL
control
Disable SPI
control of
XTAL tuning
capacitance
0 XTAL Tuning Capacitor Control[5:0]
(0.25 pF per bit, inverted binary coding)
0x80
0x1C Unused Unused Unused Unused Unused Unused Unused Unused 0x00
0x1D Unused Unused Unused Unused Unused Unused Unused Unused 0x00
0x1E Unused Unused Unused Unused Unused Unused Unused Unused Unused