Datasheet

AD9553
Rev. A | Page 3 of 44
SPECIFICATIONS
Minimum (min) and maximum (max) values apply for the full range of supply voltage and operating temperature variations. Typical (typ)
values apply for VDD = 3.3 V; T
A
= 25°C, unless otherwise noted.
POWER CONSUMPTION
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
SUPPLY VOLTAGE 3.135 3.30 3.465 V Pin 18, Pin 21, and Pin 28
TOTAL CURRENT 162 185 mA Tested with both output channels active at
maximum output frequency; LVPECL and
LVDS outputs use a 100 Ω termination
between both pins of the output driver
VDD CURRENT BY PIN Tested with both output channels active at
maximum output frequency; LVPECL and
LVDS outputs use a 100 Ω termination
between both pins of the output driver
Pin 18 93 106 mA
Pin 21
LVDS Configured Output 35 41 mA
LVPECL Configured Output 36 42 mA
CMOS Configured Output 29 34 mA
Pin 28
LVDS Configured Output 35 41 mA
LVPECL Configured Output 36 42 mA
CMOS Configured Output 29 34 mA
LOGIC INPUT PINS
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
INPUT CHARACTERISTICS
1
Logic 1 Voltage, V
IH
1.02 V For the CMOS inputs, a static Logic 1 results
from either a pull-up resistor or no connection
Logic 0 Voltage, V
IL
0.64 V
Logic 1 Current, I
IH
3 µA
Logic 0 Current, I
IL
17 µA
1
The A3 to A0 and Y5 to Y0 pins have 100 kΩ internal pull-up resistors. The OM2 to OM0 pins have 40 kΩ pull-up resistors when the device is not in SPI mode.
LOGIC OUTPUT PINS
Table 3.
Parameter Min Typ Max Unit Test Conditions/Comments
OUTPUT CHARACTERISTICS
Output Voltage High, V
OH
2.7 V Tested at 1 mA load current
Output Voltage Low, V
OL
0.19 V Tested at 1 mA load current