Datasheet

AD9553
Rev. A | Page 17 of 44
The Ax pins allow the user to select one of fifteen input reference
frequencies as shown in Table 14. The device sets the appropriate
divide-by-5 (÷5
A
, ÷5
B
), multiply-by-2 (×2
A
, ×2
B
), and input
divider (R
A
, R
B
, R
XO
) values based on the logic levels applied
to the Ax pins.
The same settings apply to both the REFA and REFB input
paths. Furthermore, the ÷5, ×2, and R values cause the PLL
input frequency to be either 16 kHz or 40/3 kHz. There are two
exceptions. The first is for Pin A3 to Pin A0 = 1101, which
yields a PLL input frequency of 155.52/59 MHz. The second is for
Pin A3 to Pin A0 = 1110, which yields a PLL input frequency of
either 1.5625 MHz or 4.86 MHz depending on the Yx pins.
Note that the XTAL input is not available for holdover func-
tionality in the A3 to A0 = 1101 and 1110 pin configurations,
thus the undefined R
XO
value.
The Yx pins allow the user to select one of 52 output frequency
combinations (f
OUT1
and f
OUT2
) per Table 15. The device sets the
appropriate P
0
, P
1
, and P
2
settings based on the logic levels applied
to the Yx pins. Note, however, that selections 101101 through
110010 require Pin A3 to Pin A0 = 1101, and selection 110011
requires Pin A3 to Pin A0 = 1110.
The value (N) of the PLL feedback divider and the control
setting for the charge pump current (CP) depend on a combi-
nation of both the Ax and Yx pin settings as shown in Table 16.
Table 14. Pin Configured Input Frequency, Ax Pins
1
Pin A3 to Pin A0 f
REFA
, f
REFB
(MHz)
Divide-by-5
A
,
Divide-by-5
B
×2
A
, ×2
B
R
A
, R
B
(Decimal) R
XO
(Decimal)
0000 SPI mode
0001 0.008 Bypassed On 1 3125
0010 1.536 Bypassed Bypassed 96 3125
0011 2.048 Bypassed Bypassed 128 3125
0100 16.384 Bypassed Bypassed 1024 3125
0101 19.44 Bypassed Bypassed 1215 3125
0110
2
25 Bypassed On 3125 3125
0111 38.88 Bypassed Bypassed 2430 3125
1000 61.44 Bypassed Bypassed 3840 3125
1001 77.76 Bypassed Bypassed 4860 3125
1010 122.88 Bypassed Bypassed 7680 3125
1011 125 On On 3125 3125
1100 1.544 Bypassed On 193 3125
1101
3
155.52 Bypassed Bypassed 59 Undefined
1110
4
25 or 77.76 Bypassed Bypassed 16 Undefined
1111 200/3 Bypassed Bypassed 5000 3750
1
For divide-by-5 and ×2 frequency scalers, “On” indicates active.
2
Using A0 to A3 = 0110 to yield a 25 MHz to 125 MHz conversion provides a loop bandwidth of 170 Hz. An alternate 25 MHz to 125 MHz conversion uses A0 to A3 = 1110, which
provides a loop bandwidth of 20 kHz.
3
Pin A3 to Pin A0 = 1101 only works with Pin Y5 to Pin Y0 =101101 through 110010.
4
Pin A3 to Pin A0 = 1110 only works with Pin Y5 to Pin Y0 =110011 or 111111.