Datasheet

AD9552 Data Sheet
Rev. E | Page 4 of 32
Parameter Min Typ Max Unit Test Conditions/Comments
Input Capacitance 3 pF
Input Resistance 130 kΩ
Duty Cycle 40 60 %
Input Voltage
Input High Voltage, V
IH
1.62
V
Input Low Voltage, V
IL
0.52 V
Input Threshold Voltage 1.0 V
When ac coupling to the input receiver, the user must dc bias the input
to 1 V
VCO CHARACTERISTICS
Frequency Range
Upper Bound 4050 MHz
Lower Bound 3350 MHz
VCO Gain 45 MHz/V
VCO Tracking Range ±300 ppm
VCO Calibration Time 140 μs f
PFD
7
= 77.76 MHz; time between completion of the VCO calibration
command (the rising edge of
CS
(Pin 12)) to the rising edge of LOCKED
(Pin 20).
1
The A[2:0], Y[5:0], and OUTSEL pins have 100 kΩ internal pull-up resistors.
2
The RESET pin has a 100 kΩ internal pull-up resistor, so the default state of the device is reset.
3
N is the integer part of the feedback divider.
4
Sigma-delta modulator.
5
The minimum allowable feedback divider value with the SDM disabled.
6
The minimum allowable feedback divider value with the SDM enabled.
7
The frequency at the input to the phase-frequency detector.
CRYSTAL INPUT CHARACTERISTICS
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
CRYSTAL FREQUENCY
Range 10 26 52 MHz
Tolerance 20 ppm
CRYSTAL MOTIONAL RESISTANCE 100 Ω
CRYSTAL LOAD CAPACITANCE 15 pF Using a crystal with a specified load capacitance other than
15 pF (8 pF to 24 pF) is possible, but necessitates using the
SPI port to configure the AD9552 crystal input capacitance.
OUTPUT CHARACTERISTICS
Table 3.
Parameter Min Typ Max Unit Test Conditions/Comments
LVPECL MODE
Differential Output Voltage Swing 690 765 889 mV Output driver static
Common-Mode Output Voltage VDD − 1.77 VDD − 1.66 VDD − 1.20 V Output driver static
Frequency Range 0 900 MHz
Duty Cycle 40 60 % Up to 805 MHz output frequency
Rise/Fall Time
1
(20% to 80%) 255 305 ps 100 Ω termination between both pins of
the output driver