Datasheet

AD9552 Data Sheet
Rev. E | Page 24 of 32
Addr.
(Hex)
Register
Name
(MSB) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
(LSB)
Bit 0
Default
capacitance
0x1C XTAL
control
Unused Unused Unused Unused Unused Unused Unused Unused 0x00
0x1D XTAL
control
Unused Unused Unused Unused Unused Select 2×
frequency
multiplier
Unused Use crystal
resonator
0x00
0x32 OUT1
driver
control
OUT1 drive
strength
OUT1
power-
down
OUT1 mode control[2:0] OUT1 CMOS polarity[1:0] Enable SPI
control of
OUT1
driver
control
0xA8
0x33 Select OUT2
source
Unused Unused Unused Unused OUT2
source
Unused Unused Unused 0x00
0x34 OUT2
driver
control
OUT2 drive
strength
OUT2
power-
down
OUT2 mode control[2:0] OUT2 CMOS polarity[1:0] Enable SPI
control of
OUT2
driver
control
0xA8
REGISTER MAP DESCRIPTIONS
Control bit functions are active high unless stated otherwise. Register address values are always hexadecimal unless otherwise indicated.
Serial Port Control (Register 0x00 to Register 0x05)
Table 18.
Address
Bit
Bit Name
Description
0x00 7 Unused Forced to Logic 0 internally, which enables 3-wire mode only.
6 LSB first Bit order for SPI port.
0 = most significant bit and byte first (default).
1 = least significant bit and byte first.
5 Register map reset Resets the register map to the default values. This is an autoclearing bit.
4 Unused Forced to Logic 1 internally, which enables 16-bit mode (the only mode supported by
the device).
[3:0] Unused Mirrored version of the contents of Register 0x00[7:4] (that is, Bits[3:0] = Bits[7:4]).
0x04 [7:1] Unused Unused.
0 Readback control For buffered registers, serial port readback reads from actual (active) registers instead of
from the buffer.
0 = reads values currently applied to the internal logic of the device (default).
1 = reads buffered values that take effect on next assertion of I/O update.
0x05 [7:1] Unused Unused.
0 I/O update Writing a 1 to this bit transfers the data in the serial I/O buffer registers to the internal
control registers of the device. This is an autoclearing bit.