Datasheet

AD9549
Rev. D | Page 61 of 76
FREE-RUN (SINGLE-TONE) MODE (REGISTER 0x01A0 TO REGISTER 0x01AD)
Register 0x01A0 to Register 0x01A5Reserved
Register 0x01A6FTW0 (Frequency Tuning Word)
Table 60.
Bit Bit Name Description
[7:0] FTW0 FTW (frequency tuning word) for DDS when the loop is not closed (see Register 0x0100, Bit 0). Also used as
the initial frequency estimate when the estimator is disabled (see Register 0x0100, Bit 4) Note that the
power-up default is defined by the startup of Pin S1 to Pin S4 (see the Default DDS Output Frequency on
Power-Up section). Updates to the FTW results in an instantaneous frequency jump but no phase discontinuity.
Register 0x01A7FTW0 (Frequency Tuning Word) (Continued)
Table 61.
Bit Bit Name Description
[15:8] FTW0 FTW (frequency tuning word) for DDS when the loop is not closed (see Register 0x0100, Bit 0). Also used as
the initial frequency estimate when the estimator is disabled (see Register 0x0100, Bit 4) Note that the
power-up default is defined by the startup of Pin S1 to Pin S4 (see the Default DDS Output Frequency on
Power-Up section). Updates to the FTW results in an instantaneous frequency jump but no phase discontinuity.
Register 0x01A8FTW0 (Frequency Tuning Word) (Continued)
Table 62.
Bit Bit Name Description
[23:16] FTW0 FTW (frequency tuning word) for DDS when the loop is not closed (see Register 0x0100, Bit 0). Also used as
the initial frequency estimate when the estimator is disabled (see Register 0x0100, Bit 4) Note that the
power-up default is defined by the startup of Pin S1 to Pin S4 (see the Default DDS Output Frequency on
Power-Up section). Updates to the FTW results in an instantaneous frequency jump but no phase discontinuity.
Register 0x01A9FTW0 (Frequency Tuning Word) (Continued)
Table 63.
Bit Bit Name Description
[31:24] FTW0 FTW (frequency tuning word) for DDS when the loop is not closed (see Register 0x0100, Bit 0). Also used as
the initial frequency estimate when the estimator is disabled (see Register 0x0100, Bit 4) Note that the
power-up default is defined by the startup of Pin S1 to Pin S4 (see the Default DDS Output Frequency on
Power-Up section). Updates to the FTW results in an instantaneous frequency jump but no phase discontinuity.
Register 0x01AAFTW0 (Frequency Tuning Word) (Continued)
Table 64.
Bit Bit Name Description
[39:32] FTW0 FTW (frequency tuning word) for DDS when the loop is not closed (see Register 0x0100, Bit 0). Also used as
the initial frequency estimate when the estimator is disabled (see Register 0x0100, Bit 4) Note that the
power-up default is defined by the startup of Pin S1 to Pin S4 (see the Default DDS Output Frequency on
Power-Up section). Updates to the FTW results in an instantaneous frequency jump but no phase discontinuity.
Register 0x01ABFTW0 (Frequency Tuning Word) (Continued)
Table 65.
Bit Bit Name Description
[47:40] FTW0 FTW (frequency tuning word) for DDS when the loop is not closed (see Register 0x0100, Bit 0). Also used as
the initial frequency estimate when the estimator is disabled (see Register 0x0100, Bit 4) Note that the
power-up default is defined by the startup of Pin S1 to Pin S4 (see the Default DDS Output Frequency on
Power-Up section). Updates to the FTW results in an instantaneous frequency jump but no phase discontinuity.