Datasheet

AD9549
Rev. D | Page 49 of 76
Addr
(Hex) Type
1
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 BIt 2 Bit 1 Bit 0
Default
(Hex)
0x0108 M Loop
coefficients
Alpha-0, Bits[7:0] 0x00
0x0109 M Alpha-0, Bits[11:8] 0x00
0x010A M Alpha-1, Bits[4:0] 0x00
0x010B M Alpha-2, Bits[2:0] 0x00
0x010C M Beta-0, Bits[7:0] 0x00
0x010D M Beta-0, Bits[11:8] 0x00
0x010E M Beta-1, Bits[2:0] 0x00
0x010F M Gamma-0, Bits[7:0] 0x00
0x0110 M Gamma-0, Bits[11:8] 0x00
0x0111 M Gamma-1, Bits[2:0] 0x00
0x0112 Reserved 0x00
0x0113 0x00
0x0114 0x00
0x0115 RO FTW
estimate
FTW estimate, Bits[47:0]
(read only)
LSB: Register 0x0115
N/A
0x0116 RO N/A
0x0117 RO N/A
0x0118 RO N/A
0x0119 RO N/A
0x011A RO N/A
0x011B M FTW limits FTW lower limit, Bits[47:0]
LSB: Register 0x011B
0x00
0x011C M 0x00
0x011D M 0x00
0x011E M 0x00
0x011F M 0x00
0x0120 M 0x00
0x0121 M FTW upper limit, Bits[47:0]
LSB: Register 0x0121
0xFF
0x0122 M 0xFF
0x0123 M 0xFF
0x0124 M 0xFF
0x0125 M 0xFF
0x0126 M 0x7F
0x0127 M Slew limit Frequency slew limit, Bits[47:0]
LSB: Register 0x0127
0x00
0x0128 M 0x00
0x0129 M 0x00
0x012A M 0x00
0x012B M 0x00
0x012C M 0x00
0x012D Reserved Reserved
0x012E
0x012F
0x0130
Free-run mode
0x01A0 Reserved Reserved
0x01A1
0x01A2
0x01A3
0x01A4
0x01A5