Datasheet

Data Sheet AD9548
Rev. E | Page 89 of 112
Table 104. Digital Loop Filter CoefficientsProfile 2
1
Address Bits Bit Name Description
0x0692 [7:0] Alpha-0 linear Alpha-0 coefficient linear, Bits[7:0]
0x0693 [7:0] Alpha-0 coefficient linear, Bits[15:8]
0x0694 [7:6] Alpha-2 exponent Alpha-2 coefficient exponent, Bits[1:0]
[5:0] Alpha-1 exponent Alpha-1 coefficient exponent, Bits[5:0]
0x0695 [7:1] Beta-0 linear Beta-0 coefficient linear, Bits[6:0]
[0] Alpha-2 exponent Alpha-2 coefficient exponent, Bit 2
0x0696 [7:0] Beta 0-linear Beta-0 coefficient linear, Bits[14:7]
0x0697 [7] Unused
[6:2] Beta-1 exponent Beta-1 coefficient exponent, Bits[4:0]
[1:0] Beta-0 linear Beta-0 coefficient linear, Bits[16:15]
0x0698 [7:0] Gamma-0 linear Gamma-0 coefficient linear, Bits[7:0]
0x0699 [7:0] Gamma-0 coefficient linear, Bits[15:8]
0x069A [7:6] Unused
[5:1] Gamma-1 exponent Gamma-1 coefficient exponent, Bits[4:0]
[0] Gamma-0 linear Gamma-0 coefficient linear, Bit 6
0x069B [7:0] Delta-0 linear Delta-0 coefficient linear, Bits[7:0]
0x069C [7] Delta-1 exponent Delta-1 coefficient exponent, Bit 0
[6:0] Delta-0 linear Delta-0 coefficient linear, Bits[14:8]
0x069D [7:4] Alpha-3 exponent Alpha-3 coefficient exponent, Bits[3:0]
[3:0] Delta-1 exponent Delta-1 coefficient exponent, Bits[4:1]
1
The digital loop filter coefficients (α, β, γ, and δ) have the general form: x(2
y
), where x is the linear component and y is the exponential component of the coefficient.
The value of the linear component (x) constitutes a fraction, where 0 ≤ x < 1. The exponential component (y) is an integer. See the Calculating Digital Filter Coefficients
section for details.
Table 105. R-DividerProfile 2
1
Address Bits Bit Name Description
0x069E [7:0] R R, Bits[7:0]
0x069F
[7:0]
R, Bits[15:8]
0x06A0 [7:0] R, Bits[23:16]
0x06A1 [7:6] Unused
[5:0]
R
R, Bits[29:24]
1
The value stored in the R-divider register yields an actual divide ratio of one more than the programmed value.
Table 106. S-DividerProfile 2
1
Address Bits Bit Name Description
0x06A2 [7:0] S S, Bits[7:0]
0x06A3 [7:0] S, Bits[15:8]
0x06A4 [7:0] S, Bits[23:16]
0x06A5 [7:6] Unused
[5:0] S S, Bits[29:24]
1
The value stored in the S-divider register yields an actual divide ratio of one more than the programmed value. Furthermore, the value of S must be at least 7.
Table 107. Fractional Feedback DividerProfile 2
Address Bits Bit Name Description
0x06A6
[7:0]
V
V, Bits[7:0]
0x06A7 [7:4] U U, Bits[3:0]
[3:2] Unused
[1:0] V V, Bits[9:8]
0x06A8 [7:6] Unused
[5:0] U U, Bits[9:4]