Datasheet

Data Sheet AD9548
Rev. E | Page 7 of 112
REFERENCE INPUTS (REFA/REFAA TO REFD/REFDD)
Table 8.
Parameter Min Typ Max Unit Test Conditions/Comments
DIFFERENTIAL OPERATION
Frequency Range
Sinusoidal Input 10 750 MHz
LVPECL Input 1 750 × 10
6
Hz
LVDS Input 1 750 × 10
6
Hz
Minimum Input Slew Rate 40 V/μs Minimum limit imposed for jitter
performance
Common-Mode Input Voltage 2 V Internally generated
Differential Input Voltage Sensitivity ±65 mV Minimum differential voltage across
pins required to ensure switching
between logic levels; the
instantaneous voltage on either pin
must not exceed the supply rails
Input Resistance 25 kΩ
Input Capacitance 3 pF
Minimum Pulse Width High 620 ps
Minimum Pulse Width Low 620 ps
SINGLE-ENDED OPERATION
Frequency Range (CMOS) 1 250 ×10
6
Hz
Minimum Input Slew Rate
40
V/μs
Minimum limit imposed for jitter
performance
Input Voltage High (V
IH
)
1.2 V to 1.5 V Threshold Setting 0.9 V
1.8 V to 2.5 V Threshold Setting 1.2 V
3.0 V to 3.3 V Threshold Setting 1.9 V
Input Voltage Low (V
IL
)
1.2 V to 1.5 V Threshold Setting 0.27 V
1.8 V to 2.5 V Threshold Setting 0.5 V
3.0 V to 3.3 V Threshold Setting 1.0 V
Input Resistance 45 kΩ
Input Capacitance
3
pF
Minimum Pulse Width High 1.5 ns
Minimum Pulse Width Low 1.5 ns
REFERENCE MONITORS
Table 9.
Parameter Min Typ Max Unit Test Conditions/Comments
REFERENCE MONITORS
Reference Monitor
Loss of Reference Detection
Time
1.2 sec Calculated using the nominal phase detector period
(NPDP = R/f
REF
)
1
Frequency Out-of Range Limits 9.54 × 10
−7
0.1 Δf/f
REF
Programmable (lower bound subject to quality of SYSCLK)
Validation Timer
0.001
65.535
sec
Programmable in 1 ms increments
Redetect Timer 0.001 65.535 sec Programmable in 1 ms increments
1
f
REF
is the frequency of the active reference; R is the frequency division factor determined by the R-divider.