Datasheet

Data Sheet AD9548
Rev. E | Page 67 of 112
Addr
Opt
Name
D7
D6
D5
D4
D3
D2
D1
D0
Def
new profile
validated
fault
cleared
fault
new profile
validated
fault
cleared
fault
0x0A09 A, C Ref BB
new profile
Ref BB
validated
Ref BB
fault
cleared
Ref BB
fault
Ref B
new profile
Ref B
validated
Ref B
fault
cleared
Ref B
fault
0x00
0x0A0A A, C Ref CC
new profile
Ref CC
validated
Ref CC
fault
cleared
Ref CC
fault
Ref C
new profile
Ref C
validated
Ref C
fault
cleared
Ref C
fault
0x00
0x0A0B A, C Ref DD
new profile
Ref DD
validated
Ref DD
fault
cleared
Ref DD
fault
Ref D
new profile
Ref D
validated
Ref D
fault
cleared
Ref D
fault
0x00
0x0A0C A, C Incremental
phase offset
Unused Reset
phase
offset
Decrement
phase
offset
Increment
phase
offset
0x00
0x0A0D A, C Reference
profile detect
Detect DD Detect D Detect CC Detect C Detect BB Detect B Detect AA Detect A 0x00
0x0A0E A, C Force
validation
timeout
Force
Timeout DD
Force
Timeout D
Force
Timeout CC
Force
Timeout C
Force
Timeout BB
Force
Timeout B
Force
Timeout AA
Force
Timeout A
0x00
0x0A0F C Reference
monitor
override
Ref Mon
Override DD
Ref Mon
Override
D
Ref Mon
Override
CC
Ref Mon
Override C
Ref Mon
Override
BB
Ref Mon
Override B
Ref Mon
Override
AA
Ref Mon
Override A
0x00
0x0A10 C Reference
monitor
bypass
Ref Mon
Bypass DD
Ref Mon
Bypass D
Ref Mon
Bypass CC
Ref Mon
Bypass C
Ref Mon
Bypass BB
Ref Mon
Bypass B
Ref Mon
Bypass AA
Ref Mon
Bypass A
0x00
User Scratch Pad (Eight Bytes)
0x0C00
Clock part
serial ID
Write user scratch pad[63:0]
0x00
0x0C01
0x00
0x0C02
0x00
0x0C03
0x00
0x0C04
0x00
0x0C05 0x00
0x0C06
0x00
0x0C07 0x00
Status (These registers are read only and are accessible during EEPROM transactions.)
0x0D00 R EEPROM Unused Fault
detected
Load in
progress
Save in
progress
0x0D01 R System clock Unused Stable Unused Unused Cal in
progress
Lock
detected
0x0D02 R IRQ monitor Unused SYSCLK
unlocked
SYSCLK
locked
Unused Unused SYSCLK Cal
complete
SYSCLK Cal
started
0x0D03 R Unused Distribu-
tion sync
Watchdog
timer
EEPROM
fault
EEPROM
complete
0x0D04 R Switching Closed Freerun Holdover Freq
unlocked
Freq
locked
Phase
unlocked
Phase
locked
0x0D05 R Unused History
updated
Freq un-
clamped
Freq
clamped
Phase slew
unlimited
Phase slew
limited
0x0D06 R Ref AA
new profile
Ref AA
validated
Ref AA
fault
cleared
Ref AA
fault
Ref A
new profile
Ref A
validated
Ref A
fault
cleared
Ref A
fault
0x0D07 R Ref BB
new profile
Ref BB
validated
Ref BB
fault
cleared
Ref BB
fault
Ref B
new profile
Ref B
validated
Ref B
fault
cleared
Ref B
fault
0x0D08 R Ref CC
new profile
Ref CC
validated
Ref CC
fault
cleared
Ref CC
fault
Ref C new
profile
Ref C
validated
Ref C
fault
cleared
Ref C
fault
0x0D09 R Ref DD
new profile
Ref DD
validated
Ref DD
fault
cleared
Ref DD
fault
Ref D new
profile
Ref D
validated
Ref D
fault
cleared
Ref D
fault
0x0D0A R, C DPLL status Offset slew
limiting
Phase
build-out
Freq lock Phase lock Loop
switching
Holdover Active Free
running
0x0D0B R, C Frequency
clamped
History
available
Active reference priority [3:0] Active reference [3:0]