Datasheet

AD9548 Data Sheet
Rev. E | Page 6 of 112
Parameter Min Typ Max Unit Test Conditions/Comments
SYSTEM CLOCK PLL ENABLED
PLL Output Frequency Range 900 1000 MHz
Phase-Frequency Detector (PFD) Rate 150 MHz
Frequency Multiplication Range 6 255 Assumes valid system clock and PFD rates
VCO Gain
70
MHz/V
High Frequency Path
Input Frequency Range 100.1 500 MHz
Minimum Input Slew Rate 200 V/μs Minimum limit imposed for jitter
performance
Frequency Divider Range 1 8 Binary steps (M = 1, 2, 4, 8)
Common-Mode Voltage
1
V
Internally generated
Differential Input Voltage Sensitivity 100 mV p-p Minimum voltage across pins required to
ensure switching between logic states;
the instantaneous voltage on either pin
must not exceed the supply rails; can
accommodate single-ended input by ac
grounding unused input
Input Capacitance 3 pF Single-ended, each pin
Input Resistance 2.5 kΩ
Low Frequency Path
Input Frequency Range
3.5
100
MHz
Minimum Input Slew Rate 50 V/μs Minimum limit imposed for jitter
performance
Common-Mode Voltage 1.2 V Internally generated
Differential Input Voltage Sensitivity 100 mV p-p Minimum voltage across pins required to
ensure switching between logic states;
the instantaneous voltage on either pin
must not exceed the supply rails; can
accommodate single-ended input by ac
grounding unused input
Input Capacitance 3 pF Single-ended, each pin
Input Resistance 4 kΩ
Crystal Resonator Path
Crystal Resonator Frequency Range 10 50 MHz Fundamental mode, AT cut
Maximum Crystal Motional Resistance 100 Ω See the System Clock Inputs section for
recommendations
DISTRIBUTION CLOCK INPUTS (CLKINP/CLKINN)
Table 7.
Parameter Min Typ Max Unit Test Conditions/Comments
DISTRIBUTION CLOCK INPUTS (CLKINP/CLKINN)
Input Frequency Range 62.5 500 MHz
Minimum Slew Rate 75 V/μs Minimum limit imposed for jitter
performance.
Common-Mode Voltage 700 mV Internally generated.
Differential Input Voltage Sensitivity 100 mV p-p Capacitive coupling required; can
accommodate single-ended input
by ac grounding unused input; the
instantaneous voltage on either pin
must not exceed the supply rails.
Differential Input Power Sensitivity
−15
dBm
The same as voltage sensitivity but
specified as power into a 50 Ω load.
Input Capacitance 3 pF
Input Resistance 5 kΩ Each pin has a 2.5 kΩ internal dc-
bias resistance.