Datasheet

AD9548 Data Sheet
Rev. E | Page 58 of 112
Data Transfer Format
Write byte format—the write byte protocol is used to write a register address to the RAM starting from the specified RAM address.
S Slave
address
W
A RAM address
high byte
A RAM address
low byte
A RAM
Data 0
A RAM
Data 1
A RAM
Data 2
A P
Send byte format—the send byte protocol is used to set up the register address for subsequent reads.
S Slave address
W
A RAM address high byte A RAM address low byte A P
Receive byte format—the receive byte protocol is used to read the data byte(s) from RAM starting from the current address.
S Slave address R A RAM Data 0 A RAM Data 1 A RAM Data 2
A
P
Read byte format—the combined format of the send byte and the receive byte.
S Slave
Address
W
A RAM
Address
High Byte
A RAM
Address
Low Byte
A Sr Slave
Address
R A RAM
Data
0
A RAM
Data
1
A RAM
Data
2
A
P
I²C Serial Port Timing
SSrS
P
S
D
A
SCL
t
SP
t
HD; STA
t
SU; STA
t
SU; DAT
t
HD; DAT
t
HD; STA
t
HI
t
LO
t
SU; STO
t
BUF
t
R
t
F
t
R
t
F
08022-040
Figure 66. I²C Serial Port Timing
Table 35. I2C Timing Definitions
Parameter Description
f
SCL
Serial clock
t
BUF
Bus free time between stop and start conditions
t
HD; STA
Repeated hold time start condition
t
SU; STA
Repeated start condition setup time
t
SU; STO
Stop condition setup time
t
HD; DAT
Data hold time
t
SU; DAT
Date setup time
t
LO
SCL clock low period
t
HI
SCL clock high period
t
R
Minimum/maximum receive SCL and SDA rise time
t
F
Minimum/maximum receive SCL and SDA fall time
t
SP
Pulse width of voltage spikes that must be suppressed by the input filter