Datasheet

Data Sheet AD9548
Rev. E | Page 3 of 112
EEPROM Storage Sequence (Register 0x0E10 to Register
0x0E3F) ...................................................................................... 102
Power Supply Partitions .............................................................. 107
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3.3 V Supplies ........................................................................... 107
1.8 V Supplies ........................................................................... 107
Thermal Performance .................................................................. 108
Calculating Digital Filter Coefficients ....................................... 109
Calculation of the  Register Values ...................................... 110
Calculation of the β Register Values ....................................... 110
Calculation of the  Register Values ....................................... 111
Calculation of the  Register Values ....................................... 111
Outline Dimensions ...................................................................... 112
Ordering Guide ......................................................................... 112
REVISION HISTORY
12/13—Rev. D to Rev. E
Changes to Calculating Digital Filter Coefficients Section .....109
Changes to Calculation of the  Register Values Section ........110
6/13—Rev. C to Rev. D
Change to Table 16 .......................................................................... 10
Changes to IRQ Pin Section .......................................................... 46
Changes to Programming the EEPROM to Include a Clock
Part ID Section ................................................................................ 50
Changes to Bit 0, Table 121 ............................................................ 94
Changes to Status Readback (Register 0x0D00 to Register
0x0D19) Section .............................................................................. 98
2/13—Rev. B to Rev. C
Change to Pin 53, Description Column, Table 21 ...................... 17
Added Figure 33, Renumbered Sequentially ............................... 23
Changes to Automatic Priority-Based Reference Switchover
Section; Added Table 23, Renumbered Sequentially ...................... 30
Changes to Low Loop Bandwidth Applications Using a
TCXO/OCXO Section .................................................................... 37
Changes to EEPROM Upload Section and EEPROM
Download Section ........................................................................... 48
Added Programming the EEPROM to Include a Clock
Part ID Section ................................................................................ 50
Changes to Read Section ................................................................ 52
Added Figure 56 .............................................................................. 54
Changes to t
C
Parameter, Description Column, Table 33 .......... 55
Added Table Summary Statement, Table 36 ................................ 60
Changes to Table 36 ........................................................................ 60
Added User Scratch Pad (Eight Bytes), Address 0x0C00 to
Address 0x0C07, Table 36 .............................................................. 67
Changes to Table 39 ........................................................................ 70
Added Clock Part Serial ID (Register 0x0C00 to
Register 0x0C07) Section and Table 131 ...................................... 98
Changes to Table 142 .................................................................... 102
Added Table 153 ............................................................................ 105
Added Table 154 ............................................................................ 106
7/11—Rev. A to Rev. B
Changed AD9584 to AD9548 ........................................................ 32
Changed 437,749,988,378,041 to 43,774,988,378,041 ................ 34
Change to Calculating Digital Filter Coefficients Section ....... 107
10/10—Rev. 0 to Rev. A
Changes to Timing Parameter, Table 17 ...................................... 11
Added Low Loop Bandwidth Applications Using a TCXO/OCXO
Section and Choosing a System Clock Oscillator Frequency
Section .............................................................................................. 37
Moved System Clock Period Section ............................................ 39
Changes to Addr 0002, Table 35.................................................... 60
Changes to Addr 0600, Table 35.................................................... 62
Changes to Addr 0632, Table 35.................................................... 63
Changes to Addr 0680, Table 35.................................................... 64
Changes to Addr 06B2, Table 35 ................................................... 65
Changes to Address 0002 Description, Table 38 ......................... 70
Changes to Bit 7 and Bit 6, Table 78 ............................................. 83
Changes to Address 0629 and Address 062A, Table 87 and Bit 7
and Bit 6, Table 88 ........................................................................... 85
Changes to Address 065B and Address 065C, Table 97 and Bit 7
and Bit 6, Table 98 ........................................................................... 87
Changes to Address 06A9 and Address 06AA, Table 107 ......... 89
Changes to Bit 7 and Bit 6, Table 108 ........................................... 90
Changes to Address 06DB and Address 06DC, Table 117 ......... 92
4/09—Revision 0: Initial Version