Datasheet
Data Sheet AD9548
Rev. E | Page 109 of 112
CALCULATING DIGITAL FILTER COEFFICIENTS
The digital loop filter coefficients (, , , and (see Figure 41))
relate to the time constants (T
1
, T
2
, and T
3
) associated with the
equivalent analog circuit for a third order loop filter (see Figure 68).
Note that AD9548 evaluation software contains a profile
designer that will compute these coefficients for you. The
user should not normally need to use these formulas.
R2
FROM
CHARGE
PUMP
TO
VCO
R3
C3
C1
C2
08022-042
Figure 68. Third Order Analog Loop Filter
The design process begins by deciding on two design
parameters related to the second order loop filter shown in
Figure 69: the desired open-loop bandwidth (f
P
) and phase
margin (.
R2
FROM
CHARGE
PUMP
TO
VCO
C1
C2
08022-043
Figure 69. Second Order Analog Loop Filter
An analysis of the second order loop filter leads to its primary
time constant, T
1
. It can be shown that T
1
is expressible in terms
of f
P
and as
)cos(
)sin(1
P
1
T
where
PP
f
2 .
An analysis of the third order loop filter leads to the definition
of another time constant, T
3
. It can be shown that T
3
is
expressible in terms of the desired amount of additional
attenuation introduced by R
3
and C
3
at some specified
frequency offset (f
OFFSET
) from the PLL output frequency.
OFFSET
ATTEN
3
T
110
10
where
OFFSETOFFSET
f
2
.
Note that ATTEN is the desired excess attenuation in decibels.
Furthermore, ATTEN and ω
OFFSET
should be chosen so that
P
f
T
5
1
3
With an expression for T
1
and T
3
, it is possible to define an
adjusted open-loop bandwidth (f
C
) that is slightly less than f
P
. It
can be shown that ω
C
(f
C
expressed as a radian frequency) is
expressible in terms of T
1
, T
3
, and θ (phase margin) as
1
)tan(
1
)tan(
2
2
2
31
3131
3131
31
C
TT
TTTT
TTTT
TT
It can also be shown that the adjusted open-loop bandwidth
leads to T
2
(the secondary time constant of the second order
loop filter) expressed as
31C
2
TT
T
2
1
Calculation of the digital loop filter coefficients requires a
scaling constant, K (related to the system clock frequency, f
S
),
and the PLL feedback divide ratio, D.
S
fK
33
2
125,578,517,30
1
V
U
SD
where S, U, and V are the integer and fractional feedback
divider values that reside in the profile registers. Keep in mind
that the desired integer feedback divide ratio is one more than
the stored value of S (hence, the +1 term in the equation for D
in this equation). This leads to the digital filter coefficients
given by
2
222
1
11
2C
3C1C
1
2C
T
TT
KT
DT
21S
TTf
1132
1S
Tf
32
3S
Tf
32
Calculation of the coefficient register values requires the
application of some special functions described as follows:
The if() function
y = if(test_statement, true_value, false_value)
where test_statement is a conditional expression (for example, x
< 3), true_value is what y equals if the conditional expression is
true, and false_value is what y equals if the conditional
expression is false.
The round() function
y = round(x)