Datasheet

AD9548 Data Sheet
Rev. E | Page 106 of 112
Table 154. EEPROM Storage Sequence for End of Data
Address Bits Bit Name Description
0x0E33 [7:0] End of data The default value of this register is 0xFF, which the controller interprets as an end
instruction. The controller stores this instruction in the EEPROM, resets the EEPROM
address pointer, and enters an idle state.
0x0E34 to
0x0E3F
Continuation of user
scratch pad area
This area is unused in the default configuration and is available for additional
EEPROM storage sequence commands. Note that the EEPROM storage sequence
must always end with either an end of data or pause command.