Datasheet
Data Sheet AD9547
Rev. E | Page 91 of 104
Table 126. IRQ Clearing for History Update, Frequency Limit, and Phase Slew Limit
Address Bit Bit Name Description
0x0A07
[7:5]
Unused
Unused.
4
History updated
Clears history updated IRQ.
3 Frequency unclamped Clears frequency unclamped IRQ.
2
Frequency clamped
Clears frequency clamped IRQ.
1
Phase slew unlimited
Clears phase slew unlimited IRQ.
0
Phase slew limited
Clears phase slew limited IRQ.
Table 127. IRQ Clearing for Reference Inputs
Address
Bit
Bit Name
Description
0x0A08 7 Ref AA new profile Clears Ref AA new profile IRQ.
6
Ref AA validated
Clears Ref AA validated IRQ.
5
Ref AA fault cleared
Clears Ref AA fault cleared IRQ.
4
Ref AA fault
Clears Ref AA fault IRQ.
3 Ref A new profile Clears Ref A new profile IRQ.
2
Ref A validated
Clears Ref A validated IRQ.
1
Ref A fault cleared
Clears Ref A fault cleared IRQ.
0 Ref A fault Clears Ref A fault IRQ.
0x0A09
7
Ref BB new profile
Clears Ref BB new profile IRQ.
6 Ref BB validated Clears Ref BB validated IRQ.
5 Ref BB fault cleared Clears Ref BB fault cleared IRQ.
4 Ref BB fault Clears Ref BB fault IRQ.
3
Ref B new profile
Clears Ref B new profile IRQ.
2 Ref B validated Clears Ref B validated IRQ.
1
Ref B fault cleared
Clears Ref B fault cleared IRQ.
0 Ref B fault Clears Ref B fault IRQ.
0x0A0A [7:0] Unused Unused.
0x0A0B
[7:0]
Table 128. Incremental Phase Offset Control
Address Bit Bit Name Description
0x0A0C
[7:3]
Unused
Unused.
2
Reset phase offset
Resets the incremental phase offset to 0. This is an autoclearing bit.
1
Decrement phase
offset
Decrements the incremental phase offset by the amount specified in the incremental
phase lock offset step size register (Register 0x0314 to Register 0x0315).
This is an autoclearing bit.
0 Increment phase
offset
Increments the incremental phase offset by the amount specified in the incremental phase
lock offset step size register (Register 0x0314 to Register 0x0315).
This is an autoclearing bit.
Table 129. Reference Profile Selection State Machine Startup
1
Address
Bit
Bit Name
Description
0x0A0D [7:4] Unused Unused.
3
Detect BB
Setting this bit starts the profile selection state machine for Input Reference BB.
2 Detect B Setting this bit starts the profile selection state machine for Input Reference B.
1
Detect AA
Setting this bit starts the profile selection state machine for Input Reference AA.
0
Detect A
Setting this bit starts the profile selection state machine for Input Reference A.
1
All bits in this register are autoclearing.