Datasheet

AD9547 Data Sheet
Rev. E | Page 68 of 104
REGISTER BIT DESCRIPTIONS
SERIAL PORT CONFIGURATION AND PART IDENTIFICATION (REGISTER 0x0000 TO REGISTER 0x0005)
Table 38. SPI Control/I
2
C Control
Address Bit Bit Name Description
0x0000
7
Unidirectional
Select SPI port SDO pin operating mode.
0 (default) = 3-wire.
1 = 4-wire (SDO pin enabled).
6 LSB first/IncAddr Bit order for SPI port.
0 (default) = most significant bit and byte first (multibyte transfers use incrementing address).
1 = least significant bit and byte first (multibyte transfers use decrementing address).
5 Soft reset Device reset (invokes an EEPROM download if M[7:3] ≠ 0).
0 (default) = normal operation.
1 = reset.
4
Long instruction
16-bit mode (the only mode supported by the device). This bit is read only and reads back as
Logic 1.
[3:0] Unused Unused.
Table 39. Reserved Register
Address Bit Bit Name Description
0x0001 [7:0] Unused Unused.
Table 40. Silicon Revision Level (Read Only)
Address
Bit
Bit Name
Description
0x0002 [7:0] Silicon revision number Default = 0xF6 = 0b11110110.
Table 41. Device ID (Read Only)
Address
Bit
Bit Name
Description
0x0003 [7:0] Device ID Default = 0x48 = 0b01001000.
Table 42. Register Readback Control
Address
Bit
Bit Name
Description
0x0004
[7:1]
Unused
Unused.
0 Read buffered register For buffered registers, serial port readback reads from actual (active) registers instead of from the
buffer.
0 (default) = reads values currently applied to the device’s internal logic.
1 = reads buffered values that take effect on the next assertion of the I/O update.
Table 43. Soft I/O Update
Address
Bit
Bit Name
Description
0x0005 [7:1] Unused Unused.
0
I/O update
Writing a 1 to this bit transfers the data in the serial I/O buffer registers to the device’s
internal control registers. This is an autoclearing bit.